| Message ID | d54cb668f3f19221fdbf34a70a9123fb3a6b4004.1716965617.git.ysato@users.sourceforge.jp |
|---|---|
| State | New |
| Headers | show |
| Series | Device Tree support for SH7751 based board | expand |
On Wed, 29 May 2024 17:01:10 +0900, Yoshinori Sato wrote: > Renesas SH series and compatible ISA CPUs. > > Signed-off-by: Yoshinori Sato <ysato@users.sourceforge.jp> > --- > .../devicetree/bindings/sh/cpus.yaml | 63 +++++++++++++++++++ > 1 file changed, 63 insertions(+) > create mode 100644 Documentation/devicetree/bindings/sh/cpus.yaml > My bot found errors running 'make dt_binding_check' on your patch: yamllint warnings/errors: dtschema/dtc warnings/errors: /builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/sh/cpus.example.dtb: cpu@0: 'clock-names', 'dcache-line-size', 'dcache-size', 'icache-line-size', 'icache-size' do not match any of the regexes: 'pinctrl-[0-9]+' from schema $id: http://devicetree.org/schemas/sh/cpus.yaml# doc reference errors (make refcheckdocs): See https://patchwork.ozlabs.org/project/devicetree-bindings/patch/d54cb668f3f19221fdbf34a70a9123fb3a6b4004.1716965617.git.ysato@users.sourceforge.jp The base for the series is generally the latest rc1. A different dependency should be noted in *this* patch. If you already ran 'make dt_binding_check' and didn't see the above error(s), then make sure 'yamllint' is installed and dt-schema is up to date: pip3 install dtschema --upgrade Please check and re-submit after running the above command yourself. Note that DT_SCHEMA_FILES can be set to your schema file to speed up checking your schema. However, it must be unset to test all examples with your schema.
diff --git a/Documentation/devicetree/bindings/sh/cpus.yaml b/Documentation/devicetree/bindings/sh/cpus.yaml new file mode 100644 index 000000000000..e652b8414ae8 --- /dev/null +++ b/Documentation/devicetree/bindings/sh/cpus.yaml @@ -0,0 +1,63 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/sh/cpus.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Renesas SuperH CPUs + +maintainers: + - Yoshinori Sato <ysato@users.sourceforge.jp> + +description: |+ + Definition of CPU core with Renesas SuperH and compatible instruction set. + +properties: + compatible: + oneOf: + - items: + - enum: + - renesas,sh2a + - renesas,sh3 + - renesas,sh4 + - renesas,sh4a + - jcore,j2 + - const: renesas,sh2 + - const: renesas,sh2 + + clocks: + maxItems: 1 + + reg: + maxItems: 1 + + device_type: + const: cpu + +required: + - compatible + - reg + - device_type + +additionalProperties: false + +examples: + - | + #include <dt-bindings/clock/sh7750-cpg.h> + cpus { + #address-cells = <1>; + #size-cells = <0>; + + cpu: cpu@0 { + compatible = "renesas,sh4", "renesas,sh2"; + device_type = "cpu"; + reg = <0>; + clocks = <&cpg SH7750_CPG_ICK>; + clock-names = "ick"; + icache-size = <16384>; + icache-line-size = <32>; + dcache-size = <32768>; + dcache-line-size = <32>; + }; + }; +...
Renesas SH series and compatible ISA CPUs. Signed-off-by: Yoshinori Sato <ysato@users.sourceforge.jp> --- .../devicetree/bindings/sh/cpus.yaml | 63 +++++++++++++++++++ 1 file changed, 63 insertions(+) create mode 100644 Documentation/devicetree/bindings/sh/cpus.yaml