Message ID | 20240910-topic-sm8x50-msm-gpio-special-pins-sm8250-v1-2-50623a7e4931@linaro.org |
---|---|
State | New |
Headers | show |
Series | qcom: allow msm_gpio to set special pins direction & value | expand |
On 10/09/2024 10:58, Neil Armstrong wrote: > Add the special pins configuration data to allow setup the bias > of the UFS and SDCard pins on the SM8250 SoC. > > Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> > --- > drivers/pinctrl/qcom/pinctrl-sm8250.c | 41 ++++++++++++++++++++++++++++++++--- > 1 file changed, 38 insertions(+), 3 deletions(-) > > diff --git a/drivers/pinctrl/qcom/pinctrl-sm8250.c b/drivers/pinctrl/qcom/pinctrl-sm8250.c > index dac24f11bc2..69c907e3868 100644 > --- a/drivers/pinctrl/qcom/pinctrl-sm8250.c > +++ b/drivers/pinctrl/qcom/pinctrl-sm8250.c > @@ -18,8 +18,37 @@ > static char pin_name[MAX_PIN_NAME_LEN] __section(".data"); > > static const struct pinctrl_function msm_pinctrl_functions[] = { { "qup12", 1 }, > - { "gpio", 0 }, > - { "sdc2_clk", 0 } }; > + { "gpio", 0 }, }; > +#define SDC_PINGROUP(pg_name, ctl, pull, drv) \ > + { \ > + .name = pg_name, \ > + .ctl_reg = ctl, \ > + .io_reg = 0, \ > + .pull_bit = pull, \ > + .drv_bit = drv, \ > + .oe_bit = -1, \ > + .in_bit = -1, \ > + .out_bit = -1, \ > + } > + > +#define UFS_RESET(pg_name, offset) \ > + { \ > + .name = pg_name, \ > + .ctl_reg = offset, \ > + .io_reg = offset + 0x4, \ > + .pull_bit = 3, \ > + .drv_bit = 0, \ > + .oe_bit = -1, \ > + .in_bit = -1, \ > + .out_bit = 0, \ > + } > + > +static const struct msm_special_pin_data sm8250_special_pins_data[] = { > + [0] = UFS_RESET("ufs_reset", SOUTH + 0xb8000), > + [1] = SDC_PINGROUP("sdc2_clk", NORTH + 0xb7000, 14, 6), > + [2] = SDC_PINGROUP("sdc2_cmd", NORTH + 0xb7000, 11, 3), > + [3] = SDC_PINGROUP("sdc2_data", NORTH + 0xb7000, 9, 0), > +}; > > static const unsigned int sm8250_pin_offsets[] = { Could you also remove the special pin entries at the end of this array? Kind regards, > [0] = SOUTH, [1] = SOUTH, [2] = SOUTH, [3] = SOUTH, [4] = NORTH, [5] = NORTH, > @@ -62,7 +91,12 @@ static const char *sm8250_get_function_name(struct udevice *dev, unsigned int se > > static const char *sm8250_get_pin_name(struct udevice *dev, unsigned int selector) > { > - snprintf(pin_name, MAX_PIN_NAME_LEN, "gpio%u", selector); > + if (selector >= 180 && selector <= 183) > + snprintf(pin_name, MAX_PIN_NAME_LEN, > + sm8250_special_pins_data[selector - 180].name); > + else > + snprintf(pin_name, MAX_PIN_NAME_LEN, "gpio%u", selector); > + > return pin_name; > } > > @@ -76,6 +110,7 @@ static struct msm_pinctrl_data sm8250_data = { > .pin_offsets = sm8250_pin_offsets, > .pin_count = ARRAY_SIZE(sm8250_pin_offsets), > .special_pins_start = 180, > + .special_pins_data = sm8250_special_pins_data, > }, > .functions_count = ARRAY_SIZE(msm_pinctrl_functions), > .get_function_name = sm8250_get_function_name, >
On 10/09/2024 14:14, Caleb Connolly wrote: > > > On 10/09/2024 10:58, Neil Armstrong wrote: >> Add the special pins configuration data to allow setup the bias >> of the UFS and SDCard pins on the SM8250 SoC. >> >> Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> >> --- >> drivers/pinctrl/qcom/pinctrl-sm8250.c | 41 ++++++++++++++++++++++++++++++++--- >> 1 file changed, 38 insertions(+), 3 deletions(-) >> >> diff --git a/drivers/pinctrl/qcom/pinctrl-sm8250.c b/drivers/pinctrl/qcom/pinctrl-sm8250.c >> index dac24f11bc2..69c907e3868 100644 >> --- a/drivers/pinctrl/qcom/pinctrl-sm8250.c >> +++ b/drivers/pinctrl/qcom/pinctrl-sm8250.c >> @@ -18,8 +18,37 @@ >> static char pin_name[MAX_PIN_NAME_LEN] __section(".data"); >> >> static const struct pinctrl_function msm_pinctrl_functions[] = { { "qup12", 1 }, >> - { "gpio", 0 }, >> - { "sdc2_clk", 0 } }; >> + { "gpio", 0 }, }; >> +#define SDC_PINGROUP(pg_name, ctl, pull, drv) \ >> + { \ >> + .name = pg_name, \ >> + .ctl_reg = ctl, \ >> + .io_reg = 0, \ >> + .pull_bit = pull, \ >> + .drv_bit = drv, \ >> + .oe_bit = -1, \ >> + .in_bit = -1, \ >> + .out_bit = -1, \ >> + } >> + >> +#define UFS_RESET(pg_name, offset) \ >> + { \ >> + .name = pg_name, \ >> + .ctl_reg = offset, \ >> + .io_reg = offset + 0x4, \ >> + .pull_bit = 3, \ >> + .drv_bit = 0, \ >> + .oe_bit = -1, \ >> + .in_bit = -1, \ >> + .out_bit = 0, \ >> + } >> + >> +static const struct msm_special_pin_data sm8250_special_pins_data[] = { >> + [0] = UFS_RESET("ufs_reset", SOUTH + 0xb8000), >> + [1] = SDC_PINGROUP("sdc2_clk", NORTH + 0xb7000, 14, 6), >> + [2] = SDC_PINGROUP("sdc2_cmd", NORTH + 0xb7000, 11, 3), >> + [3] = SDC_PINGROUP("sdc2_data", NORTH + 0xb7000, 9, 0), >> +}; >> >> static const unsigned int sm8250_pin_offsets[] = { > > Could you also remove the special pin entries at the end of this array? Sure ! Neil > > Kind regards, >> [0] = SOUTH, [1] = SOUTH, [2] = SOUTH, [3] = SOUTH, [4] = NORTH, [5] = NORTH, >> @@ -62,7 +91,12 @@ static const char *sm8250_get_function_name(struct udevice *dev, unsigned int se >> >> static const char *sm8250_get_pin_name(struct udevice *dev, unsigned int selector) >> { >> - snprintf(pin_name, MAX_PIN_NAME_LEN, "gpio%u", selector); >> + if (selector >= 180 && selector <= 183) >> + snprintf(pin_name, MAX_PIN_NAME_LEN, >> + sm8250_special_pins_data[selector - 180].name); >> + else >> + snprintf(pin_name, MAX_PIN_NAME_LEN, "gpio%u", selector); >> + >> return pin_name; >> } >> >> @@ -76,6 +110,7 @@ static struct msm_pinctrl_data sm8250_data = { >> .pin_offsets = sm8250_pin_offsets, >> .pin_count = ARRAY_SIZE(sm8250_pin_offsets), >> .special_pins_start = 180, >> + .special_pins_data = sm8250_special_pins_data, >> }, >> .functions_count = ARRAY_SIZE(msm_pinctrl_functions), >> .get_function_name = sm8250_get_function_name, >> >
diff --git a/drivers/pinctrl/qcom/pinctrl-sm8250.c b/drivers/pinctrl/qcom/pinctrl-sm8250.c index dac24f11bc2..69c907e3868 100644 --- a/drivers/pinctrl/qcom/pinctrl-sm8250.c +++ b/drivers/pinctrl/qcom/pinctrl-sm8250.c @@ -18,8 +18,37 @@ static char pin_name[MAX_PIN_NAME_LEN] __section(".data"); static const struct pinctrl_function msm_pinctrl_functions[] = { { "qup12", 1 }, - { "gpio", 0 }, - { "sdc2_clk", 0 } }; + { "gpio", 0 }, }; +#define SDC_PINGROUP(pg_name, ctl, pull, drv) \ + { \ + .name = pg_name, \ + .ctl_reg = ctl, \ + .io_reg = 0, \ + .pull_bit = pull, \ + .drv_bit = drv, \ + .oe_bit = -1, \ + .in_bit = -1, \ + .out_bit = -1, \ + } + +#define UFS_RESET(pg_name, offset) \ + { \ + .name = pg_name, \ + .ctl_reg = offset, \ + .io_reg = offset + 0x4, \ + .pull_bit = 3, \ + .drv_bit = 0, \ + .oe_bit = -1, \ + .in_bit = -1, \ + .out_bit = 0, \ + } + +static const struct msm_special_pin_data sm8250_special_pins_data[] = { + [0] = UFS_RESET("ufs_reset", SOUTH + 0xb8000), + [1] = SDC_PINGROUP("sdc2_clk", NORTH + 0xb7000, 14, 6), + [2] = SDC_PINGROUP("sdc2_cmd", NORTH + 0xb7000, 11, 3), + [3] = SDC_PINGROUP("sdc2_data", NORTH + 0xb7000, 9, 0), +}; static const unsigned int sm8250_pin_offsets[] = { [0] = SOUTH, [1] = SOUTH, [2] = SOUTH, [3] = SOUTH, [4] = NORTH, [5] = NORTH, @@ -62,7 +91,12 @@ static const char *sm8250_get_function_name(struct udevice *dev, unsigned int se static const char *sm8250_get_pin_name(struct udevice *dev, unsigned int selector) { - snprintf(pin_name, MAX_PIN_NAME_LEN, "gpio%u", selector); + if (selector >= 180 && selector <= 183) + snprintf(pin_name, MAX_PIN_NAME_LEN, + sm8250_special_pins_data[selector - 180].name); + else + snprintf(pin_name, MAX_PIN_NAME_LEN, "gpio%u", selector); + return pin_name; } @@ -76,6 +110,7 @@ static struct msm_pinctrl_data sm8250_data = { .pin_offsets = sm8250_pin_offsets, .pin_count = ARRAY_SIZE(sm8250_pin_offsets), .special_pins_start = 180, + .special_pins_data = sm8250_special_pins_data, }, .functions_count = ARRAY_SIZE(msm_pinctrl_functions), .get_function_name = sm8250_get_function_name,
Add the special pins configuration data to allow setup the bias of the UFS and SDCard pins on the SM8250 SoC. Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> --- drivers/pinctrl/qcom/pinctrl-sm8250.c | 41 ++++++++++++++++++++++++++++++++--- 1 file changed, 38 insertions(+), 3 deletions(-)