Message ID | 20241007134240.12278-1-ahsan.atta@intel.com |
---|---|
State | Accepted |
Commit | 70199359902f1c7187dcb28a1be679a7081de7cc |
Headers | show |
Series | crypto: qat - remove faulty arbiter config reset | expand |
On Mon, Oct 07, 2024 at 02:42:40PM +0100, Ahsan Atta wrote: > Resetting the service arbiter config can cause potential issues > related to response ordering and ring flow control check in the > event of AER or device hang. This is because it results in changing > the default response ring size from 32 bytes to 16 bytes. The service > arbiter config reset also disables response ring flow control check. > Thus, by removing this reset we can prevent the service arbiter from > being configured inappropriately, which leads to undesired device > behaviour in the event of errors. > > Fixes: 7afa232e76ce ("crypto: qat - Intel(R) QAT DH895xcc accelerator") > Signed-off-by: Ahsan Atta <ahsan.atta@intel.com> > Reviewed-by: Giovanni Cabiddu <giovanni.cabiddu@intel.com> > --- > drivers/crypto/intel/qat/qat_common/adf_hw_arbiter.c | 4 ---- > 1 file changed, 4 deletions(-) Patch applied. Thanks.
diff --git a/drivers/crypto/intel/qat/qat_common/adf_hw_arbiter.c b/drivers/crypto/intel/qat/qat_common/adf_hw_arbiter.c index 65bd26b25abc..f93d9cca70ce 100644 --- a/drivers/crypto/intel/qat/qat_common/adf_hw_arbiter.c +++ b/drivers/crypto/intel/qat/qat_common/adf_hw_arbiter.c @@ -90,10 +90,6 @@ void adf_exit_arb(struct adf_accel_dev *accel_dev) hw_data->get_arb_info(&info); - /* Reset arbiter configuration */ - for (i = 0; i < ADF_ARB_NUM; i++) - WRITE_CSR_ARB_SARCONFIG(csr, arb_off, i, 0); - /* Unmap worker threads to service arbiters */ for (i = 0; i < hw_data->num_engines; i++) WRITE_CSR_ARB_WT2SAM(csr, arb_off, wt_off, i, 0);