| Message ID | 20241015120750.21217-2-quic_jseerapu@quicinc.com |
|---|---|
| State | New |
| Headers | show |
| Series | Add Block event interrupt support for I2C protocol | expand |
On 10/15/2024 7:31 PM, Rob Herring wrote: > On Tue, Oct 15, 2024 at 05:37:46PM +0530, Jyothi Kumar Seerapu wrote: >> When high performance with multiple i2c messages in a single transfer >> is required, employ Block Event Interrupt (BEI) to trigger interrupts >> after specific messages transfer and the last message transfer, >> thereby reducing interrupts. >> >> For each i2c message transfer, a series of Transfer Request Elements(TREs) >> must be programmed, including config tre for frequency configuration, >> go tre for holding i2c address and dma tre for holding dma buffer address, >> length as per the hardware programming guide. For transfer using BEI, >> multiple I2C messages may necessitate the preparation of config, go, >> and tx DMA TREs. However, a channel TRE size of 64 is often insufficient, >> potentially leading to failures due to inadequate memory space. >> >> Add additional argument to dma-cell property for channel TRE size. > > No such property 'dma-cell' Thanks for pointing it out, yeah it should be 'dma-cells'. > >> With this, adjust the channel TRE size via the device tree. >> The default size is 64, but clients can modify this value based on >> their specific requirements. >> >> Signed-off-by: Jyothi Kumar Seerapu <quic_jseerapu@quicinc.com> >> --- >> Documentation/devicetree/bindings/dma/qcom,gpi.yaml | 6 ++++-- >> 1 file changed, 4 insertions(+), 2 deletions(-) >> >> diff --git a/Documentation/devicetree/bindings/dma/qcom,gpi.yaml b/Documentation/devicetree/bindings/dma/qcom,gpi.yaml >> index 4df4e61895d2..002495921643 100644 >> --- a/Documentation/devicetree/bindings/dma/qcom,gpi.yaml >> +++ b/Documentation/devicetree/bindings/dma/qcom,gpi.yaml >> @@ -54,14 +54,16 @@ properties: >> maxItems: 13 >> >> "#dma-cells": >> - const: 3 >> + minItems: 3 >> + maxItems: 4 >> description: > >> DMA clients must use the format described in dma.txt, giving a phandle >> - to the DMA controller plus the following 3 integer cells: >> + to the DMA controller plus the following 4 integer cells: >> - channel: if set to 0xffffffff, any available channel will be allocated >> for the client. Otherwise, the exact channel specified will be used. >> - seid: serial id of the client as defined in the SoC documentation. >> - client: type of the client as defined in dt-bindings/dma/qcom-gpi.h >> + - channel-tre-size: size of the channel TRE (transfer ring element) >> >> iommus: >> maxItems: 1 >> -- >> 2.17.1 >>
On 10/15/2024 6:56 PM, Rob Herring (Arm) wrote: > > On Tue, 15 Oct 2024 17:37:46 +0530, Jyothi Kumar Seerapu wrote: >> When high performance with multiple i2c messages in a single transfer >> is required, employ Block Event Interrupt (BEI) to trigger interrupts >> after specific messages transfer and the last message transfer, >> thereby reducing interrupts. >> >> For each i2c message transfer, a series of Transfer Request Elements(TREs) >> must be programmed, including config tre for frequency configuration, >> go tre for holding i2c address and dma tre for holding dma buffer address, >> length as per the hardware programming guide. For transfer using BEI, >> multiple I2C messages may necessitate the preparation of config, go, >> and tx DMA TREs. However, a channel TRE size of 64 is often insufficient, >> potentially leading to failures due to inadequate memory space. >> >> Add additional argument to dma-cell property for channel TRE size. >> With this, adjust the channel TRE size via the device tree. >> The default size is 64, but clients can modify this value based on >> their specific requirements. >> >> Signed-off-by: Jyothi Kumar Seerapu <quic_jseerapu@quicinc.com> >> --- >> Documentation/devicetree/bindings/dma/qcom,gpi.yaml | 6 ++++-- >> 1 file changed, 4 insertions(+), 2 deletions(-) >> > > My bot found errors running 'make dt_binding_check' on your patch: > > yamllint warnings/errors: > > dtschema/dtc warnings/errors: > /builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/dma/qcom,gpi.yaml: properties:#dma-cells: 'minItems' is not one of ['description', 'deprecated', 'const', 'enum', 'minimum', 'maximum', 'multipleOf', 'default', '$ref', 'oneOf'] > from schema $id: http://devicetree.org/meta-schemas/core.yaml# > /builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/dma/qcom,gpi.yaml: properties:#dma-cells: 'maxItems' is not one of ['description', 'deprecated', 'const', 'enum', 'minimum', 'maximum', 'multipleOf', 'default', '$ref', 'oneOf'] > from schema $id: http://devicetree.org/meta-schemas/core.yaml# > > doc reference errors (make refcheckdocs): > > See https://patchwork.ozlabs.org/project/devicetree-bindings/patch/20241015120750.21217-2-quic_jseerapu@quicinc.com > > The base for the series is generally the latest rc1. A different dependency > should be noted in *this* patch. > > If you already ran 'make dt_binding_check' and didn't see the above > error(s), then make sure 'yamllint' is installed and dt-schema is up to > date: > > pip3 install dtschema --upgrade > > Please check and re-submit after running the above command yourself. Note > that DT_SCHEMA_FILES can be set to your schema file to speed up checking > your schema. However, it must be unset to test all examples with your schema. > Thanks, i followed the instructions and resolved errors which observed with 'make dt_binding_check'. But in V2 patch, i have reverted the DT and binding changes related to adding new argument for dma-cells property and instead used existing value for channel TRE size in GPI driver. Regrads, JyothiKumar
diff --git a/Documentation/devicetree/bindings/dma/qcom,gpi.yaml b/Documentation/devicetree/bindings/dma/qcom,gpi.yaml index 4df4e61895d2..002495921643 100644 --- a/Documentation/devicetree/bindings/dma/qcom,gpi.yaml +++ b/Documentation/devicetree/bindings/dma/qcom,gpi.yaml @@ -54,14 +54,16 @@ properties: maxItems: 13 "#dma-cells": - const: 3 + minItems: 3 + maxItems: 4 description: > DMA clients must use the format described in dma.txt, giving a phandle - to the DMA controller plus the following 3 integer cells: + to the DMA controller plus the following 4 integer cells: - channel: if set to 0xffffffff, any available channel will be allocated for the client. Otherwise, the exact channel specified will be used. - seid: serial id of the client as defined in the SoC documentation. - client: type of the client as defined in dt-bindings/dma/qcom-gpi.h + - channel-tre-size: size of the channel TRE (transfer ring element) iommus: maxItems: 1
When high performance with multiple i2c messages in a single transfer is required, employ Block Event Interrupt (BEI) to trigger interrupts after specific messages transfer and the last message transfer, thereby reducing interrupts. For each i2c message transfer, a series of Transfer Request Elements(TREs) must be programmed, including config tre for frequency configuration, go tre for holding i2c address and dma tre for holding dma buffer address, length as per the hardware programming guide. For transfer using BEI, multiple I2C messages may necessitate the preparation of config, go, and tx DMA TREs. However, a channel TRE size of 64 is often insufficient, potentially leading to failures due to inadequate memory space. Add additional argument to dma-cell property for channel TRE size. With this, adjust the channel TRE size via the device tree. The default size is 64, but clients can modify this value based on their specific requirements. Signed-off-by: Jyothi Kumar Seerapu <quic_jseerapu@quicinc.com> --- Documentation/devicetree/bindings/dma/qcom,gpi.yaml | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-)