| Message ID | 20241028-alpha-mode-cleanup-v2-4-9bc6d712bd76@gmail.com |
|---|---|
| State | New |
| Headers | show |
| Series | clk: qcom: remove superfluous alpha settings from PLL configs | expand |
On Mon, Oct 28, 2024 at 07:48:18PM +0100, Gabor Juhos wrote: > Since both the 'alpha' and 'alpha_hi' members of the configuration is > initialized (the latter is implicitly) with zero values, the output > rate of the PLL will be the same whether alpha mode is enabled or not. > > Remove the initialization of the alpha* members to make it clear that > the alpha mode is not required to get the desired output rate. > > Despite that enabling alpha mode is not needed for the initial > configuration, the set_rate() op might require that it is enabled > already. In this particular case however, the clk_alpha_pll_set_rate() > function will get reset the ALPHA_EN bit when the PLL's rate changes, > so dropping 'alpha_en_mask' is safe. > > No functional changes intended, compile tested only. > > Signed-off-by: Gabor Juhos <j4g8y7@gmail.com> > --- > Changes in v2: > - extend the commit message to indicate that dropping 'alpha_en_mask' is safe > - Link to v1: https://lore.kernel.org/r/20241021-alpha-mode-cleanup-v1-4-55df8ed73645@gmail.com > --- > drivers/clk/qcom/dispcc-qcm2290.c | 2 -- > 1 file changed, 2 deletions(-) > Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
diff --git a/drivers/clk/qcom/dispcc-qcm2290.c b/drivers/clk/qcom/dispcc-qcm2290.c index 449ffea2295d3760f40abe8b1195e9022f46a9b0..d7bb1399e1022afc68e45ee335d615d4a5be5add 100644 --- a/drivers/clk/qcom/dispcc-qcm2290.c +++ b/drivers/clk/qcom/dispcc-qcm2290.c @@ -40,8 +40,6 @@ static const struct pll_vco spark_vco[] = { /* 768MHz configuration */ static const struct alpha_pll_config disp_cc_pll0_config = { .l = 0x28, - .alpha = 0x0, - .alpha_en_mask = BIT(24), .vco_val = 0x2 << 20, .vco_mask = GENMASK(21, 20), .main_output_mask = BIT(0),
Since both the 'alpha' and 'alpha_hi' members of the configuration is initialized (the latter is implicitly) with zero values, the output rate of the PLL will be the same whether alpha mode is enabled or not. Remove the initialization of the alpha* members to make it clear that the alpha mode is not required to get the desired output rate. Despite that enabling alpha mode is not needed for the initial configuration, the set_rate() op might require that it is enabled already. In this particular case however, the clk_alpha_pll_set_rate() function will get reset the ALPHA_EN bit when the PLL's rate changes, so dropping 'alpha_en_mask' is safe. No functional changes intended, compile tested only. Signed-off-by: Gabor Juhos <j4g8y7@gmail.com> --- Changes in v2: - extend the commit message to indicate that dropping 'alpha_en_mask' is safe - Link to v1: https://lore.kernel.org/r/20241021-alpha-mode-cleanup-v1-4-55df8ed73645@gmail.com --- drivers/clk/qcom/dispcc-qcm2290.c | 2 -- 1 file changed, 2 deletions(-)