diff mbox series

[1/2] rng: msm: add support for newer Qualcomm hwrandom IPs

Message ID 20241125-topic-sm8x50-rng-v1-1-52b72821c3e9@linaro.org
State New
Headers show
Series rng: msm: support newer SoCs | expand

Commit Message

Neil Armstrong Nov. 25, 2024, 5:12 p.m. UTC 
On recent Qualcomm SoCs, the hardware random generator
is initialized and handled by the firmware because shared
between different Execution Environments (EE), thus the
initialization step should be skipped.

Also support the newer "TRNG" found on SM8550 and newer
SoCs that has inbuilt NIST SP800 90B compliant entropic source.

Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
---
 drivers/rng/msm_rng.c | 13 ++++++++++++-
 1 file changed, 12 insertions(+), 1 deletion(-)
diff mbox series

Patch

diff --git a/drivers/rng/msm_rng.c b/drivers/rng/msm_rng.c
index 658c153d3edb2590b0b470e3067da9aac76169ac..f790d3b60f99bfc04ecd9acdd21405a8c38c257a 100644
--- a/drivers/rng/msm_rng.c
+++ b/drivers/rng/msm_rng.c
@@ -34,6 +34,7 @@ 
 struct msm_rng_priv {
 	phys_addr_t base;
 	struct clk clk;
+	bool skip_init;
 };
 
 static int msm_rng_read(struct udevice *dev, void *data, size_t len)
@@ -100,10 +101,15 @@  static int msm_rng_probe(struct udevice *dev)
 
 	int ret;
 
+	priv->skip_init = (bool)dev_get_driver_data(dev);
+
 	priv->base = dev_read_addr(dev);
 	if (priv->base == FDT_ADDR_T_NONE)
 		return -EINVAL;
 
+	if (priv->skip_init)
+		return 0;
+
 	ret = clk_get_by_index(dev, 0, &priv->clk);
 	if (ret)
 		return ret;
@@ -119,6 +125,9 @@  static int msm_rng_remove(struct udevice *dev)
 {
 	struct msm_rng_priv *priv = dev_get_priv(dev);
 
+	if (priv->skip_init)
+		return 0;
+
 	return msm_rng_enable(priv, 0);
 }
 
@@ -127,7 +136,9 @@  static const struct dm_rng_ops msm_rng_ops = {
 };
 
 static const struct udevice_id msm_rng_match[] = {
-	{ .compatible = "qcom,prng", },
+	{ .compatible = "qcom,prng", .data = (ulong)false },
+	{ .compatible = "qcom,prng-ee", .data = (ulong)true },
+	{ .compatible = "qcom,trng", .data = (ulong)true },
 	{},
 };