diff mbox series

[PATCH-for-10.0,v2,02/13] hw/pci-bridge: Initialize bridge with parent bus flags

Message ID 20241126112212.64524-3-philmd@linaro.org
State New
Headers show
Series hw/boards: Remove legacy MachineClass::pci_allow_0_address flag | expand

Commit Message

Philippe Mathieu-Daudé Nov. 26, 2024, 11:22 a.m. UTC 
Bridged buses inherit their parent flag,
except they can not be a root.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
 hw/pci-bridge/pci_expander_bridge.c | 8 ++++++--
 hw/pci/pci_bridge.c                 | 1 +
 2 files changed, 7 insertions(+), 2 deletions(-)
diff mbox series

Patch

diff --git a/hw/pci-bridge/pci_expander_bridge.c b/hw/pci-bridge/pci_expander_bridge.c
index 07d411cff52..bbf615f544b 100644
--- a/hw/pci-bridge/pci_expander_bridge.c
+++ b/hw/pci-bridge/pci_expander_bridge.c
@@ -336,6 +336,7 @@  static bool pxb_dev_realize_common(PCIDevice *dev, enum BusType type,
     PXBDev *pxb = PXB_DEV(dev);
     DeviceState *ds, *bds = NULL;
     PCIBus *bus;
+    PCIBus *parent_bus = pci_get_bus(dev);
     const char *dev_name = NULL;
     Error *local_err = NULL;
     MachineState *ms = MACHINE(qdev_get_machine());
@@ -358,12 +359,15 @@  static bool pxb_dev_realize_common(PCIDevice *dev, enum BusType type,
     ds = qdev_new(type == CXL ? TYPE_PXB_CXL_HOST : TYPE_PXB_HOST);
     if (type == PCIE) {
         bus = pci_root_bus_new(ds, dev_name, NULL, NULL, 0, TYPE_PXB_PCIE_BUS);
+        bus->flags = parent_bus->flags & ~PCI_BUS_IS_ROOT;
     } else if (type == CXL) {
         bus = pci_root_bus_new(ds, dev_name, NULL, NULL, 0, TYPE_PXB_CXL_BUS);
+        bus->flags = parent_bus->flags & ~PCI_BUS_IS_ROOT;
         bus->flags |= PCI_BUS_CXL;
         PXB_CXL_DEV(dev)->cxl_host_bridge = PXB_CXL_HOST(ds);
     } else {
         bus = pci_root_bus_new(ds, "pxb-internal", NULL, NULL, 0, TYPE_PXB_BUS);
+        bus->flags = parent_bus->flags & ~PCI_BUS_IS_ROOT;
         bds = qdev_new("pci-bridge");
         bds->id = g_strdup(dev_name);
         qdev_prop_set_uint8(bds, PCI_BRIDGE_DEV_PROP_CHASSIS_NR, pxb->bus_nr);
@@ -371,8 +375,8 @@  static bool pxb_dev_realize_common(PCIDevice *dev, enum BusType type,
     }
 
     bus->parent_dev = dev;
-    bus->address_space_mem = pci_get_bus(dev)->address_space_mem;
-    bus->address_space_io = pci_get_bus(dev)->address_space_io;
+    bus->address_space_mem = parent_bus->address_space_mem;
+    bus->address_space_io = parent_bus->address_space_io;
     bus->map_irq = pxb_map_irq_fn;
 
     PCI_HOST_BRIDGE(ds)->bus = bus;
diff --git a/hw/pci/pci_bridge.c b/hw/pci/pci_bridge.c
index 2c7bb1a5254..d47ded9e0cf 100644
--- a/hw/pci/pci_bridge.c
+++ b/hw/pci/pci_bridge.c
@@ -376,6 +376,7 @@  void pci_bridge_initfn(PCIDevice *dev, const char *typename)
 
     qbus_init(sec_bus, sizeof(br->sec_bus), typename, DEVICE(dev),
               br->bus_name);
+    sec_bus->flags = parent->flags & ~PCI_BUS_IS_ROOT;
     sec_bus->parent_dev = dev;
     sec_bus->map_irq = br->map_irq ? br->map_irq : pci_swizzle_map_irq_fn;
     sec_bus->address_space_mem = &br->address_space_mem;