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From: Lijuan Gao <quic_lijuang@quicinc.com>
Date: Thu, 12 Dec 2024 17:24:01 +0800
Subject: [PATCH 2/6] dt-bindings: pinctrl: qcom: correct gpio-ranges in
examples for qcs8300
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| Series |
Correct the number of GPIOs in gpio-ranges for QCS615 and QCS8300
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expand
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diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,qcs8300-tlmm.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,qcs8300-tlmm.yaml index bb0d7132886a..489b41dcc179 100644 --- a/Documentation/devicetree/bindings/pinctrl/qcom,qcs8300-tlmm.yaml +++ b/Documentation/devicetree/bindings/pinctrl/qcom,qcs8300-tlmm.yaml @@ -106,7 +106,7 @@ examples: interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>; gpio-controller; #gpio-cells = <2>; - gpio-ranges = <&tlmm 0 0 133>; + gpio-ranges = <&tlmm 0 0 134>; interrupt-controller; #interrupt-cells = <2>;
The QCS8300 TLMM pin controller have the UFS_RESET pin, which is expected to be wired to the reset pin of the primary UFS memory. Include it in gpio-ranges so that the UFS driver can toggle it. Fixes: 5778535972e2 ("dt-bindings: pinctrl: describe qcs8300-tlmm") Signed-off-by: Lijuan Gao <quic_lijuang@quicinc.com> --- Documentation/devicetree/bindings/pinctrl/qcom,qcs8300-tlmm.yaml | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)