| Message ID | 20241225-03-k1-gpio-v3-1-27bb7b441d62@gentoo.org |
|---|---|
| State | New |
| Headers | show |
| Series | riscv: spacemit: add gpio support for K1 SoC | expand |
On Wed, Dec 25, 2024 at 1:33 AM Yixun Lan <dlan@gentoo.org> wrote: > The GPIO controller of K1 support basic functions as input/output, > all pins can be used as interrupt which route to one IRQ line, > trigger type can be select between rising edge, failing edge, or both. > There are four GPIO banks, each consisting of 32 pins. > > Signed-off-by: Yixun Lan <dlan@gentoo.org> Looks good to me: Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Yours, Linus Walleij
On Wed, Dec 25, 2024 at 1:33 AM Yixun Lan <dlan@gentoo.org> wrote: > The GPIO controller of K1 support basic functions as input/output, > all pins can be used as interrupt which route to one IRQ line, > trigger type can be select between rising edge, failing edge, or both. > There are four GPIO banks, each consisting of 32 pins. (...) > +description: > + The controller's registers are organized as sets of eight 32-bit > + registers with each set controlling a bank of up to 32 pins. A single > + interrupt is shared for all of the banks handled by the controller. I looked at the driver and came to the conclusion that it's better to use 4 different instances of the chip, one for each set of 32bit registers, so these 4 GPIO controllers are instantiated separately. The operating system can handle the shared interrupt, there is no need to use a single device instance just because the interrupt is shared. DT bindings are operating system neutral, but for example in Linux (if we pretend this is just one possible example) then a driver handling a shared IRQ can be requested with the flag IRQF_SHARED and the driver can just return IRQ_HANDLED if it handled an IRQ or IRQ_NONE if it didn't handle the irq (so other instances can handle it). Yours, Linus Walleij
Hi Linus: thanks for your review On 17:34 Fri 27 Dec , Linus Walleij wrote: > On Wed, Dec 25, 2024 at 1:33 AM Yixun Lan <dlan@gentoo.org> wrote: > > > The GPIO controller of K1 support basic functions as input/output, > > all pins can be used as interrupt which route to one IRQ line, > > trigger type can be select between rising edge, failing edge, or both. > > There are four GPIO banks, each consisting of 32 pins. > (...) > > +description: > > + The controller's registers are organized as sets of eight 32-bit > > + registers with each set controlling a bank of up to 32 pins. A single > > + interrupt is shared for all of the banks handled by the controller. > > I looked at the driver and came to the conclusion that it's better to use > 4 different instances of the chip, one for each set of 32bit registers, > so these 4 GPIO controllers are instantiated separately. > sounds good to me, I will work according to this in next version > The operating system can handle the shared interrupt, there is no > need to use a single device instance just because the interrupt is > shared. > > DT bindings are operating system neutral, but for example in Linux > (if we pretend this is just one possible example) then a driver > handling a shared IRQ can be requested with the flag IRQF_SHARED > and the driver can just return IRQ_HANDLED if it handled an IRQ > or IRQ_NONE if it didn't handle the irq (so other instances can > handle it). > agree, make sense > Yours, > Linus Walleij
diff --git a/Documentation/devicetree/bindings/gpio/spacemit,k1-gpio.yaml b/Documentation/devicetree/bindings/gpio/spacemit,k1-gpio.yaml new file mode 100644 index 0000000000000000000000000000000000000000..6ce8f27bd4a5a85f730420e103ea51710200d301 --- /dev/null +++ b/Documentation/devicetree/bindings/gpio/spacemit,k1-gpio.yaml @@ -0,0 +1,69 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/gpio/spacemit,k1-gpio.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: SpacemiT K1 GPIO controller + +maintainers: + - Yixun Lan <dlan@gentoo.org> + +description: + The controller's registers are organized as sets of eight 32-bit + registers with each set controlling a bank of up to 32 pins. A single + interrupt is shared for all of the banks handled by the controller. + +properties: + compatible: + const: spacemit,k1-gpio + + reg: + maxItems: 1 + + "#gpio-cells": + const: 2 + + gpio-controller: true + + gpio-ranges: true + + interrupts: + maxItems: 1 + description: + The interrupt shared by all GPIO lines for this controller. + + "#interrupt-cells": + const: 2 + description: + The first cell is the GPIO number, the second should specify interrupt + flag. The controller does not support level interrupts, flags of + IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_LOW should not be used. + Refer <dt-bindings/interrupt-controller/irq.h> for valid flags. + + interrupt-controller: true + +required: + - compatible + - reg + - gpio-controller + - "#gpio-cells" + - interrupts + - interrupt-controller + - "#interrupt-cells" + +additionalProperties: false + +examples: + - | + gpio@d4019000 { + compatible = "spacemit,k1-gpio"; + reg = <0xd4019000 0x800>; + gpio-controller; + #gpio-cells = <2>; + interrupts = <58>; + interrupt-parent = <&plic>; + interrupt-controller; + #interrupt-cells = <2>; + gpio-ranges = <&pinctrl 0 0 128>; + };
The GPIO controller of K1 support basic functions as input/output, all pins can be used as interrupt which route to one IRQ line, trigger type can be select between rising edge, failing edge, or both. There are four GPIO banks, each consisting of 32 pins. Signed-off-by: Yixun Lan <dlan@gentoo.org> --- .../devicetree/bindings/gpio/spacemit,k1-gpio.yaml | 69 ++++++++++++++++++++++ 1 file changed, 69 insertions(+)