diff mbox series

[54/73] tcg: Pass TCGOp to tcg_target_op_def

Message ID 20250102180654.1420056-55-richard.henderson@linaro.org
State New
Headers show
Series tcg: Merge *_i32 and *_i64 opcodes | expand

Commit Message

Richard Henderson Jan. 2, 2025, 6:06 p.m. UTC 
Allow the backend to make constraint choices based on
the entire TCGOp.  The type and vector element fields
within the main TCGOp structure are valid to inspect,
as well as any constant operands, e.g. a MemOp.

We lose the ability to assert the correctness of the map
from TCGOpcode to constraint sets at startup, but we can
still validate at runtime upon lookup.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
 tcg/tcg.c                        | 51 +++++++-------------------------
 tcg/aarch64/tcg-target.c.inc     |  4 +--
 tcg/arm/tcg-target.c.inc         |  4 +--
 tcg/i386/tcg-target.c.inc        |  4 +--
 tcg/loongarch64/tcg-target.c.inc |  4 +--
 tcg/mips/tcg-target.c.inc        |  4 +--
 tcg/ppc/tcg-target.c.inc         |  4 +--
 tcg/riscv/tcg-target.c.inc       |  4 +--
 tcg/s390x/tcg-target.c.inc       |  4 +--
 tcg/sparc64/tcg-target.c.inc     |  4 +--
 tcg/tci/tcg-target.c.inc         |  4 +--
 11 files changed, 31 insertions(+), 60 deletions(-)
diff mbox series

Patch

diff --git a/tcg/tcg.c b/tcg/tcg.c
index 095008ac25..fb8b1f2a2d 100644
--- a/tcg/tcg.c
+++ b/tcg/tcg.c
@@ -875,7 +875,7 @@  typedef enum {
 #include "tcg-target-con-set.h"
 } TCGConstraintSetIndex;
 
-static TCGConstraintSetIndex tcg_target_op_def(TCGOpcode);
+static TCGConstraintSetIndex tcg_target_op_def(const TCGOp *);
 
 #undef C_O0_I1
 #undef C_O0_I2
@@ -1512,14 +1512,14 @@  static void init_call_layout(TCGHelperInfo *info)
 }
 
 static int indirect_reg_alloc_order[ARRAY_SIZE(tcg_target_reg_alloc_order)];
-static void process_op_defs(TCGContext *s);
+static void process_constraint_sets(void);
 static TCGTemp *tcg_global_reg_new_internal(TCGContext *s, TCGType type,
                                             TCGReg reg, const char *name);
 
 static void tcg_context_init(unsigned max_cpus)
 {
     TCGContext *s = &tcg_init_ctx;
-    int  n, i;
+    int n, i;
     TCGTemp *ts;
 
     memset(s, 0, sizeof(*s));
@@ -1533,7 +1533,7 @@  static void tcg_context_init(unsigned max_cpus)
     init_call_layout(&info_helper_st128_mmu);
 
     tcg_target_init(s);
-    process_op_defs(s);
+    process_constraint_sets();
 
     /* Reverse the order of the saved registers, assuming they're all at
        the start of tcg_target_reg_alloc_order.  */
@@ -3135,12 +3135,8 @@  static void sort_constraints(TCGArgConstraint *a, int start, int n)
 static const TCGArgConstraint empty_cts[TCG_MAX_OP_ARGS];
 static TCGArgConstraint all_args_cts[ARRAY_SIZE(constraint_sets)][TCG_MAX_OP_ARGS];
 
-static void process_op_defs(TCGContext *s)
+static void process_constraint_sets(void)
 {
-    /*
-     * Process each constraint set.
-     */
-
     for (size_t c = 0; c < ARRAY_SIZE(constraint_sets); ++c) {
         const TCGConstraintSet *tdefs = &constraint_sets[c];
         TCGArgConstraint *args_ct = all_args_cts[c];
@@ -3323,36 +3319,6 @@  static void process_op_defs(TCGContext *s)
         sort_constraints(args_ct, 0, nb_oargs);
         sort_constraints(args_ct, nb_oargs, nb_iargs);
     }
-
-    for (TCGOpcode op = 0; op < NB_OPS; op++) {
-        const TCGOpDef *def = &tcg_op_defs[op];
-        const TCGConstraintSet *tdefs;
-        TCGConstraintSetIndex con_set;
-        TCGType type;
-
-        if (def->flags & TCG_OPF_NOT_PRESENT) {
-            continue;
-        }
-
-        type = (def->flags & TCG_OPF_VECTOR ? TCG_TYPE_V64
-                : def->flags & TCG_OPF_64BIT ? TCG_TYPE_I64
-                : TCG_TYPE_I32);
-        if (!tcg_op_supported(op, type)) {
-            continue;
-        }
-
-        /*
-         * Macro magic should make it impossible, but double-check that
-         * the array index is in range.
-         */
-        con_set = tcg_target_op_def(op);
-        tcg_debug_assert(con_set >= 0 && con_set < ARRAY_SIZE(constraint_sets));
-
-        /* The constraint arguments must match TCGOpcode arguments. */
-        tdefs = &constraint_sets[con_set];
-        tcg_debug_assert(tdefs->nb_oargs == def->nb_oargs);
-        tcg_debug_assert(tdefs->nb_iargs == def->nb_iargs);
-    }
 }
 
 static const TCGArgConstraint *opcode_args_ct(const TCGOp *op)
@@ -3367,8 +3333,13 @@  static const TCGArgConstraint *opcode_args_ct(const TCGOp *op)
 
     tcg_debug_assert(tcg_op_supported(opc, op->type));
 
-    con_set = tcg_target_op_def(opc);
+    con_set = tcg_target_op_def(op);
     tcg_debug_assert(con_set >= 0 && con_set < ARRAY_SIZE(constraint_sets));
+
+    /* The constraint arguments must match TCGOpcode arguments. */
+    tcg_debug_assert(constraint_sets[con_set].nb_oargs == def->nb_oargs);
+    tcg_debug_assert(constraint_sets[con_set].nb_iargs == def->nb_iargs);
+
     return all_args_cts[con_set];
 }
 
diff --git a/tcg/aarch64/tcg-target.c.inc b/tcg/aarch64/tcg-target.c.inc
index 72e64c7dba..acc6dadfe5 100644
--- a/tcg/aarch64/tcg-target.c.inc
+++ b/tcg/aarch64/tcg-target.c.inc
@@ -2961,9 +2961,9 @@  void tcg_expand_vec_op(TCGOpcode opc, TCGType type, unsigned vece,
     }
 }
 
-static TCGConstraintSetIndex tcg_target_op_def(TCGOpcode op)
+static TCGConstraintSetIndex tcg_target_op_def(const TCGOp *op)
 {
-    switch (op) {
+    switch (op->opc) {
     case INDEX_op_goto_ptr:
         return C_O0_I1(r);
 
diff --git a/tcg/arm/tcg-target.c.inc b/tcg/arm/tcg-target.c.inc
index d0c39f7122..e8908702d2 100644
--- a/tcg/arm/tcg-target.c.inc
+++ b/tcg/arm/tcg-target.c.inc
@@ -2162,9 +2162,9 @@  static void tcg_out_op(TCGContext *s, TCGOpcode opc,
     }
 }
 
-static TCGConstraintSetIndex tcg_target_op_def(TCGOpcode op)
+static TCGConstraintSetIndex tcg_target_op_def(const TCGOp *op)
 {
-    switch (op) {
+    switch (op->opc) {
     case INDEX_op_goto_ptr:
         return C_O0_I1(r);
 
diff --git a/tcg/i386/tcg-target.c.inc b/tcg/i386/tcg-target.c.inc
index b6b15723b4..aa6b72f591 100644
--- a/tcg/i386/tcg-target.c.inc
+++ b/tcg/i386/tcg-target.c.inc
@@ -3661,9 +3661,9 @@  static void tcg_out_vec_op(TCGContext *s, TCGOpcode opc,
     }
 }
 
-static TCGConstraintSetIndex tcg_target_op_def(TCGOpcode op)
+static TCGConstraintSetIndex tcg_target_op_def(const TCGOp *op)
 {
-    switch (op) {
+    switch (op->opc) {
     case INDEX_op_goto_ptr:
         return C_O0_I1(r);
 
diff --git a/tcg/loongarch64/tcg-target.c.inc b/tcg/loongarch64/tcg-target.c.inc
index 900558d301..293bf36656 100644
--- a/tcg/loongarch64/tcg-target.c.inc
+++ b/tcg/loongarch64/tcg-target.c.inc
@@ -2209,9 +2209,9 @@  void tcg_expand_vec_op(TCGOpcode opc, TCGType type, unsigned vece,
     g_assert_not_reached();
 }
 
-static TCGConstraintSetIndex tcg_target_op_def(TCGOpcode op)
+static TCGConstraintSetIndex tcg_target_op_def(const TCGOp *op)
 {
-    switch (op) {
+    switch (op->opc) {
     case INDEX_op_goto_ptr:
         return C_O0_I1(r);
 
diff --git a/tcg/mips/tcg-target.c.inc b/tcg/mips/tcg-target.c.inc
index d2ace88aae..8d3b005f2d 100644
--- a/tcg/mips/tcg-target.c.inc
+++ b/tcg/mips/tcg-target.c.inc
@@ -2168,9 +2168,9 @@  static void tcg_out_op(TCGContext *s, TCGOpcode opc,
     }
 }
 
-static TCGConstraintSetIndex tcg_target_op_def(TCGOpcode op)
+static TCGConstraintSetIndex tcg_target_op_def(const TCGOp *op)
 {
-    switch (op) {
+    switch (op->opc) {
     case INDEX_op_goto_ptr:
         return C_O0_I1(r);
 
diff --git a/tcg/ppc/tcg-target.c.inc b/tcg/ppc/tcg-target.c.inc
index 62110619f0..0cb04241fa 100644
--- a/tcg/ppc/tcg-target.c.inc
+++ b/tcg/ppc/tcg-target.c.inc
@@ -4161,9 +4161,9 @@  void tcg_expand_vec_op(TCGOpcode opc, TCGType type, unsigned vece,
     va_end(va);
 }
 
-static TCGConstraintSetIndex tcg_target_op_def(TCGOpcode op)
+static TCGConstraintSetIndex tcg_target_op_def(const TCGOp *op)
 {
-    switch (op) {
+    switch (op->opc) {
     case INDEX_op_goto_ptr:
         return C_O0_I1(r);
 
diff --git a/tcg/riscv/tcg-target.c.inc b/tcg/riscv/tcg-target.c.inc
index 8e0a2d967e..37a2be0551 100644
--- a/tcg/riscv/tcg-target.c.inc
+++ b/tcg/riscv/tcg-target.c.inc
@@ -2611,9 +2611,9 @@  int tcg_can_emit_vec_op(TCGOpcode opc, TCGType type, unsigned vece)
     }
 }
 
-static TCGConstraintSetIndex tcg_target_op_def(TCGOpcode op)
+static TCGConstraintSetIndex tcg_target_op_def(const TCGOp *op)
 {
-    switch (op) {
+    switch (op->opc) {
     case INDEX_op_goto_ptr:
         return C_O0_I1(r);
 
diff --git a/tcg/s390x/tcg-target.c.inc b/tcg/s390x/tcg-target.c.inc
index cb0b7ff25e..35a9d6ee45 100644
--- a/tcg/s390x/tcg-target.c.inc
+++ b/tcg/s390x/tcg-target.c.inc
@@ -3235,9 +3235,9 @@  void tcg_expand_vec_op(TCGOpcode opc, TCGType type, unsigned vece,
     va_end(va);
 }
 
-static TCGConstraintSetIndex tcg_target_op_def(TCGOpcode op)
+static TCGConstraintSetIndex tcg_target_op_def(const TCGOp *op)
 {
-    switch (op) {
+    switch (op->opc) {
     case INDEX_op_goto_ptr:
         return C_O0_I1(r);
 
diff --git a/tcg/sparc64/tcg-target.c.inc b/tcg/sparc64/tcg-target.c.inc
index c104636cf7..6d28498815 100644
--- a/tcg/sparc64/tcg-target.c.inc
+++ b/tcg/sparc64/tcg-target.c.inc
@@ -1535,9 +1535,9 @@  static void tcg_out_op(TCGContext *s, TCGOpcode opc,
     }
 }
 
-static TCGConstraintSetIndex tcg_target_op_def(TCGOpcode op)
+static TCGConstraintSetIndex tcg_target_op_def(const TCGOp *op)
 {
-    switch (op) {
+    switch (op->opc) {
     case INDEX_op_goto_ptr:
         return C_O0_I1(r);
 
diff --git a/tcg/tci/tcg-target.c.inc b/tcg/tci/tcg-target.c.inc
index 57293e1458..583cec1ecf 100644
--- a/tcg/tci/tcg-target.c.inc
+++ b/tcg/tci/tcg-target.c.inc
@@ -36,9 +36,9 @@ 
 #endif
 #define TCG_TARGET_CALL_RET_I128        TCG_CALL_RET_NORMAL
 
-static TCGConstraintSetIndex tcg_target_op_def(TCGOpcode op)
+static TCGConstraintSetIndex tcg_target_op_def(const TCGOp *op)
 {
-    switch (op) {
+    switch (op->opc) {
     case INDEX_op_goto_ptr:
         return C_O0_I1(r);