| Message ID | 20250107080112.1175095-45-richard.henderson@linaro.org |
|---|---|
| State | New |
| Headers | show |
| Series | tcg: Merge *_i32 and *_i64 opcodes | expand |
On 7/1/25 09:00, Richard Henderson wrote: > Extracts which abut bit 32 may use 32-bit shifts. > > Signed-off-by: Richard Henderson <richard.henderson@linaro.org> > --- > tcg/sparc64/tcg-target-has.h | 9 +++++++-- > tcg/sparc64/tcg-target.c.inc | 11 +++++++++++ > 2 files changed, 18 insertions(+), 2 deletions(-) > > diff --git a/tcg/sparc64/tcg-target-has.h b/tcg/sparc64/tcg-target-has.h > index d9ca14cc3d..2db461efed 100644 > --- a/tcg/sparc64/tcg-target-has.h > +++ b/tcg/sparc64/tcg-target-has.h Missing: -- >8 -- @@ -33,8 +33,8 @@ extern bool use_vis3_instructions; #define TCG_TARGET_HAS_ctz_i32 0 #define TCG_TARGET_HAS_ctpop_i32 0 #define TCG_TARGET_HAS_deposit_i32 0 -#define TCG_TARGET_HAS_extract_i32 0 -#define TCG_TARGET_HAS_sextract_i32 0 +#define TCG_TARGET_HAS_extract_i32 1 +#define TCG_TARGET_HAS_sextract_i32 1 #define TCG_TARGET_HAS_extract2_i32 0 #define TCG_TARGET_HAS_negsetcond_i32 1 #define TCG_TARGET_HAS_add2_i32 1 --- > @@ -68,8 +68,8 @@ extern bool use_vis3_instructions; > #define TCG_TARGET_HAS_ctz_i64 0 > #define TCG_TARGET_HAS_ctpop_i64 0 > #define TCG_TARGET_HAS_deposit_i64 0 > -#define TCG_TARGET_HAS_extract_i64 0 > -#define TCG_TARGET_HAS_sextract_i64 0 > +#define TCG_TARGET_HAS_extract_i64 1 > +#define TCG_TARGET_HAS_sextract_i64 1 > #define TCG_TARGET_HAS_extract2_i64 0 > #define TCG_TARGET_HAS_negsetcond_i64 1 > #define TCG_TARGET_HAS_add2_i64 1 > @@ -83,4 +83,9 @@ extern bool use_vis3_instructions; > > #define TCG_TARGET_HAS_tst 1 > > +#define TCG_TARGET_extract_valid(type, ofs, len) \ > + ((type) == TCG_TYPE_I64 && (ofs) + (len) == 32) > + > +#define TCG_TARGET_sextract_valid TCG_TARGET_extract_valid > + > #endif
On 10/1/25 00:00, Philippe Mathieu-Daudé wrote: > On 7/1/25 09:00, Richard Henderson wrote: >> Extracts which abut bit 32 may use 32-bit shifts. >> >> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> >> --- >> tcg/sparc64/tcg-target-has.h | 9 +++++++-- >> tcg/sparc64/tcg-target.c.inc | 11 +++++++++++ >> 2 files changed, 18 insertions(+), 2 deletions(-) >> >> diff --git a/tcg/sparc64/tcg-target-has.h b/tcg/sparc64/tcg-target-has.h >> index d9ca14cc3d..2db461efed 100644 >> --- a/tcg/sparc64/tcg-target-has.h >> +++ b/tcg/sparc64/tcg-target-has.h > > Missing: > > -- >8 -- > @@ -33,8 +33,8 @@ extern bool use_vis3_instructions; > #define TCG_TARGET_HAS_ctz_i32 0 > #define TCG_TARGET_HAS_ctpop_i32 0 > #define TCG_TARGET_HAS_deposit_i32 0 > -#define TCG_TARGET_HAS_extract_i32 0 > -#define TCG_TARGET_HAS_sextract_i32 0 > +#define TCG_TARGET_HAS_extract_i32 1 > +#define TCG_TARGET_HAS_sextract_i32 1 > #define TCG_TARGET_HAS_extract2_i32 0 > #define TCG_TARGET_HAS_negsetcond_i32 1 > #define TCG_TARGET_HAS_add2_i32 1 > --- Otherwise patch LGTM, so with that squashed: Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> > >> @@ -68,8 +68,8 @@ extern bool use_vis3_instructions; >> #define TCG_TARGET_HAS_ctz_i64 0 >> #define TCG_TARGET_HAS_ctpop_i64 0 >> #define TCG_TARGET_HAS_deposit_i64 0 >> -#define TCG_TARGET_HAS_extract_i64 0 >> -#define TCG_TARGET_HAS_sextract_i64 0 >> +#define TCG_TARGET_HAS_extract_i64 1 >> +#define TCG_TARGET_HAS_sextract_i64 1 >> #define TCG_TARGET_HAS_extract2_i64 0 >> #define TCG_TARGET_HAS_negsetcond_i64 1 >> #define TCG_TARGET_HAS_add2_i64 1 >> @@ -83,4 +83,9 @@ extern bool use_vis3_instructions; >> #define TCG_TARGET_HAS_tst 1 >> +#define TCG_TARGET_extract_valid(type, ofs, len) \ >> + ((type) == TCG_TYPE_I64 && (ofs) + (len) == 32) >> + >> +#define TCG_TARGET_sextract_valid TCG_TARGET_extract_valid >> + >> #endif >
On 10/1/25 00:44, Philippe Mathieu-Daudé wrote: > On 10/1/25 00:00, Philippe Mathieu-Daudé wrote: >> On 7/1/25 09:00, Richard Henderson wrote: >>> Extracts which abut bit 32 may use 32-bit shifts. (Fix typos?) >>> >>> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> >>> --- >>> tcg/sparc64/tcg-target-has.h | 9 +++++++-- >>> tcg/sparc64/tcg-target.c.inc | 11 +++++++++++ >>> 2 files changed, 18 insertions(+), 2 deletions(-) >>> >>> diff --git a/tcg/sparc64/tcg-target-has.h b/tcg/sparc64/tcg-target-has.h >>> index d9ca14cc3d..2db461efed 100644 >>> --- a/tcg/sparc64/tcg-target-has.h >>> +++ b/tcg/sparc64/tcg-target-has.h >> >> Missing: >> >> -- >8 -- >> @@ -33,8 +33,8 @@ extern bool use_vis3_instructions; >> #define TCG_TARGET_HAS_ctz_i32 0 >> #define TCG_TARGET_HAS_ctpop_i32 0 >> #define TCG_TARGET_HAS_deposit_i32 0 >> -#define TCG_TARGET_HAS_extract_i32 0 >> -#define TCG_TARGET_HAS_sextract_i32 0 >> +#define TCG_TARGET_HAS_extract_i32 1 >> +#define TCG_TARGET_HAS_sextract_i32 1 >> #define TCG_TARGET_HAS_extract2_i32 0 >> #define TCG_TARGET_HAS_negsetcond_i32 1 >> #define TCG_TARGET_HAS_add2_i32 1 >> --- > > Otherwise patch LGTM, so with that squashed: > Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> > >> >>> @@ -68,8 +68,8 @@ extern bool use_vis3_instructions; >>> #define TCG_TARGET_HAS_ctz_i64 0 >>> #define TCG_TARGET_HAS_ctpop_i64 0 >>> #define TCG_TARGET_HAS_deposit_i64 0 >>> -#define TCG_TARGET_HAS_extract_i64 0 >>> -#define TCG_TARGET_HAS_sextract_i64 0 >>> +#define TCG_TARGET_HAS_extract_i64 1 >>> +#define TCG_TARGET_HAS_sextract_i64 1 >>> #define TCG_TARGET_HAS_extract2_i64 0 >>> #define TCG_TARGET_HAS_negsetcond_i64 1 >>> #define TCG_TARGET_HAS_add2_i64 1 >>> @@ -83,4 +83,9 @@ extern bool use_vis3_instructions; >>> #define TCG_TARGET_HAS_tst 1 >>> +#define TCG_TARGET_extract_valid(type, ofs, len) \ >>> + ((type) == TCG_TYPE_I64 && (ofs) + (len) == 32) >>> + >>> +#define TCG_TARGET_sextract_valid TCG_TARGET_extract_valid >>> + >>> #endif >> >
diff --git a/tcg/sparc64/tcg-target-has.h b/tcg/sparc64/tcg-target-has.h index d9ca14cc3d..2db461efed 100644 --- a/tcg/sparc64/tcg-target-has.h +++ b/tcg/sparc64/tcg-target-has.h @@ -68,8 +68,8 @@ extern bool use_vis3_instructions; #define TCG_TARGET_HAS_ctz_i64 0 #define TCG_TARGET_HAS_ctpop_i64 0 #define TCG_TARGET_HAS_deposit_i64 0 -#define TCG_TARGET_HAS_extract_i64 0 -#define TCG_TARGET_HAS_sextract_i64 0 +#define TCG_TARGET_HAS_extract_i64 1 +#define TCG_TARGET_HAS_sextract_i64 1 #define TCG_TARGET_HAS_extract2_i64 0 #define TCG_TARGET_HAS_negsetcond_i64 1 #define TCG_TARGET_HAS_add2_i64 1 @@ -83,4 +83,9 @@ extern bool use_vis3_instructions; #define TCG_TARGET_HAS_tst 1 +#define TCG_TARGET_extract_valid(type, ofs, len) \ + ((type) == TCG_TYPE_I64 && (ofs) + (len) == 32) + +#define TCG_TARGET_sextract_valid TCG_TARGET_extract_valid + #endif diff --git a/tcg/sparc64/tcg-target.c.inc b/tcg/sparc64/tcg-target.c.inc index afc778fae7..733cb51651 100644 --- a/tcg/sparc64/tcg-target.c.inc +++ b/tcg/sparc64/tcg-target.c.inc @@ -1510,6 +1510,15 @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc, TCGType type, tcg_out_mb(s, a0); break; + case INDEX_op_extract_i64: + tcg_debug_assert(a2 + args[3] == 32); + tcg_out_arithi(s, a0, a1, a2, SHIFT_SRL); + break; + case INDEX_op_sextract_i64: + tcg_debug_assert(a2 + args[3] == 32); + tcg_out_arithi(s, a0, a1, a2, SHIFT_SRA); + break; + case INDEX_op_mov_i32: /* Always emitted via tcg_out_mov. */ case INDEX_op_mov_i64: case INDEX_op_call: /* Always emitted via tcg_out_call. */ @@ -1559,6 +1568,8 @@ tcg_target_op_def(TCGOpcode op, TCGType type, unsigned flags) case INDEX_op_ext32u_i64: case INDEX_op_ext_i32_i64: case INDEX_op_extu_i32_i64: + case INDEX_op_extract_i64: + case INDEX_op_sextract_i64: case INDEX_op_qemu_ld_a32_i32: case INDEX_op_qemu_ld_a64_i32: case INDEX_op_qemu_ld_a32_i64:
Extracts which abut bit 32 may use 32-bit shifts. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> --- tcg/sparc64/tcg-target-has.h | 9 +++++++-- tcg/sparc64/tcg-target.c.inc | 11 +++++++++++ 2 files changed, 18 insertions(+), 2 deletions(-)