@@ -13,6 +13,7 @@
#include "qemu/main-loop.h"
#include "block/aio.h"
#include "hw/i2c/i2c.h"
+#include "trace.h"
#define TYPE_I2C_ECHO "i2c-echo"
OBJECT_DECLARE_SIMPLE_TYPE(I2CEchoState, I2C_ECHO)
@@ -80,11 +81,13 @@ static int i2c_echo_event(I2CSlave *s, enum i2c_event event)
case I2C_START_RECV:
state->pos = 0;
+ trace_i2c_echo_event(DEVICE(s)->canonical_path, "I2C_START_RECV");
break;
case I2C_START_SEND:
state->pos = 0;
+ trace_i2c_echo_event(DEVICE(s)->canonical_path, "I2C_START_SEND");
break;
case I2C_FINISH:
@@ -92,12 +95,15 @@ static int i2c_echo_event(I2CSlave *s, enum i2c_event event)
state->state = I2C_ECHO_STATE_START_SEND;
i2c_bus_master(state->bus, state->bh);
+ trace_i2c_echo_event(DEVICE(s)->canonical_path, "I2C_FINISH");
break;
case I2C_NACK:
+ trace_i2c_echo_event(DEVICE(s)->canonical_path, "I2C_NACK");
break;
default:
+ trace_i2c_echo_event(DEVICE(s)->canonical_path, "UNHANDLED");
return -1;
}
@@ -112,6 +118,7 @@ static uint8_t i2c_echo_recv(I2CSlave *s)
return 0xff;
}
+ trace_i2c_echo_recv(DEVICE(s)->canonical_path, state->data[state->pos]);
return state->data[state->pos++];
}
@@ -119,6 +126,7 @@ static int i2c_echo_send(I2CSlave *s, uint8_t data)
{
I2CEchoState *state = I2C_ECHO(s);
+ trace_i2c_echo_send(DEVICE(s)->canonical_path, data);
if (state->pos > 2) {
return -1;
}
@@ -390,3 +390,8 @@ ivshmem_flat_read_write_mmr_invalid(uint64_t addr_offset) "No ivshmem register m
ivshmem_flat_interrupt_invalid_peer(uint16_t peer_id) "Can't interrupt non-existing peer %u"
ivshmem_flat_write_mmr(uint64_t addr_offset) "Write access at offset %"PRIu64
ivshmem_flat_interrupt_peer(uint16_t peer_id, uint16_t vector_id) "Interrupting peer ID %u, vector %u..."
+
+# i2c-echo.c
+i2c_echo_event(const char *id, const char *event) "%s: %s"
+i2c_echo_recv(const char *id, uint8_t data) "%s: recv 0x%02" PRIx8
+i2c_echo_send(const char *id, uint8_t data) "%s: send 0x%02" PRIx8