diff mbox series

[v1,2/6] doc: update meminfo with arch specific information

Message ID 20250205071714.635518-3-ilias.apalodimas@linaro.org
State New
Headers show
Series Fix page permission on arm64 architectures | expand

Commit Message

Ilias Apalodimas Feb. 5, 2025, 7:16 a.m. UTC
Since we added support in meminfo to dump live page tables, describe
the only working architecture for now (aarch64) and add links to public
documentation for further reading.

Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
---
 doc/usage/cmd/meminfo.rst | 71 +++++++++++++++++++++++++++++----------
 1 file changed, 53 insertions(+), 18 deletions(-)

Comments

Tom Rini Feb. 5, 2025, 5:22 p.m. UTC | #1
On Wed, Feb 05, 2025 at 09:16:46AM +0200, Ilias Apalodimas wrote:

> Since we added support in meminfo to dump live page tables, describe
> the only working architecture for now (aarch64) and add links to public
> documentation for further reading.
> 
> Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>

Generally looks good, a small change however please:

[snip]
> @@ -26,8 +27,9 @@ The layout of memory is set up before relocation, within the init sequence in
>  ending with the stack. This results in the maximum possible amount of memory
>  being left free for image-loading.
>  
> -The meminfo command writes the DRAM size, then the rest of its outputs in 5
> -columns:
> +The meminfo command writes the DRAM size. If the architecture supports it
> +(currently only aarch64) dumps the page table entries and then the rest of
> +its outputs in 5 columns:

How about:
If the architecture also supports it, page table entries will be shown
next. Finally the rest of the outputs are printed in 5 columns:

This will make sure that when the next architecture adds support the
documentation doesn't need to be updated here (and the temptation to
list every arch that does this will be resisted). Thanks!
Ilias Apalodimas Feb. 5, 2025, 5:35 p.m. UTC | #2
Hi Tom,

On Wed, 5 Feb 2025 at 19:22, Tom Rini <trini@konsulko.com> wrote:
>
> On Wed, Feb 05, 2025 at 09:16:46AM +0200, Ilias Apalodimas wrote:
>
> > Since we added support in meminfo to dump live page tables, describe
> > the only working architecture for now (aarch64) and add links to public
> > documentation for further reading.
> >
> > Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
>
> Generally looks good, a small change however please:
>
> [snip]
> > @@ -26,8 +27,9 @@ The layout of memory is set up before relocation, within the init sequence in
> >  ending with the stack. This results in the maximum possible amount of memory
> >  being left free for image-loading.
> >
> > -The meminfo command writes the DRAM size, then the rest of its outputs in 5
> > -columns:
> > +The meminfo command writes the DRAM size. If the architecture supports it
> > +(currently only aarch64) dumps the page table entries and then the rest of
> > +its outputs in 5 columns:
>
> How about:
> If the architecture also supports it, page table entries will be shown
> next. Finally the rest of the outputs are printed in 5 columns:
>
> This will make sure that when the next architecture adds support the
> documentation doesn't need to be updated here (and the temptation to
> list every arch that does this will be resisted). Thanks!

Sure, this makes sense.

Thanks
/Ilias
>
> --
> Tom
Simon Glass Feb. 6, 2025, 12:31 p.m. UTC | #3
Hi Ilias,

On Wed, 5 Feb 2025 at 00:17, Ilias Apalodimas
<ilias.apalodimas@linaro.org> wrote:
>
> Since we added support in meminfo to dump live page tables, describe
> the only working architecture for now (aarch64) and add links to public
> documentation for further reading.
>
> Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
> ---
>  doc/usage/cmd/meminfo.rst | 71 +++++++++++++++++++++++++++++----------
>  1 file changed, 53 insertions(+), 18 deletions(-)

This is useless information for most people. I would rather have it
behind a flag.

Regards,
Simon
Ilias Apalodimas Feb. 6, 2025, 12:32 p.m. UTC | #4
Hi Simon

On Thu, 6 Feb 2025 at 14:31, Simon Glass <sjg@chromium.org> wrote:
>
> Hi Ilias,
>
> On Wed, 5 Feb 2025 at 00:17, Ilias Apalodimas
> <ilias.apalodimas@linaro.org> wrote:
> >
> > Since we added support in meminfo to dump live page tables, describe
> > the only working architecture for now (aarch64) and add links to public
> > documentation for further reading.
> >
> > Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
> > ---
> >  doc/usage/cmd/meminfo.rst | 71 +++++++++++++++++++++++++++++----------
> >  1 file changed, 53 insertions(+), 18 deletions(-)
>
> This is useless information for most people. I would rather have it
> behind a flag.
>

Ok I can move the call a few lines below CONFIG_CMD_MEMINFO_MAP

Thanks
/Ilias
> Regards,
> Simon
diff mbox series

Patch

diff --git a/doc/usage/cmd/meminfo.rst b/doc/usage/cmd/meminfo.rst
index 6c94493cccc6..cf123f653059 100644
--- a/doc/usage/cmd/meminfo.rst
+++ b/doc/usage/cmd/meminfo.rst
@@ -18,7 +18,8 @@  Description
 
 The meminfo command shows the amount of memory. If ``CONFIG_CMD_MEMINFO_MAP`` is
 enabled, then it also shows the layout of memory used by U-Boot and the region
-which is free for use by images.
+which is free for use by images. In architectures that support it, it also prints
+the mapped pages and their permissions. The latter is architecture specific.
 
 The layout of memory is set up before relocation, within the init sequence in
 ``board_init_f()``, specifically the various ``reserve_...()`` functions. This
@@ -26,8 +27,9 @@  The layout of memory is set up before relocation, within the init sequence in
 ending with the stack. This results in the maximum possible amount of memory
 being left free for image-loading.
 
-The meminfo command writes the DRAM size, then the rest of its outputs in 5
-columns:
+The meminfo command writes the DRAM size. If the architecture supports it
+(currently only aarch64) dumps the page table entries and then the rest of
+its outputs in 5 columns:
 
 Region
    Name of the region
@@ -99,28 +101,61 @@  free
     Free memory, which is available for loading images. The base address of
     this is ``gd->ram_base`` which is generally set by ``CFG_SYS_SDRAM_BASE``.
 
+Aarch64 specific flags
+----------------------
+
+More information on the output can be found
+Chapter D8 - The AArch64 Virtual Memory System Architecture at
+https://developer.arm.com/documentation/ddi0487/latest/
+
+In short, for a stage 1 translation regime the following apply:
+
+* RWX: Pages mapped with Read, Write and Execute permissions
+* RO:  Pages mapped with Read-Only permissions
+* PXN: PXN (Privileged Execute Never) applies to execution at EL1 and above
+* UXN: UXN (Unprivileged Execute Never) applies to EL0
+
 Example
 -------
 
 This example shows output with both ``CONFIG_CMD_MEMINFO`` and
-``CONFIG_CMD_MEMINFO_MAP`` enabled::
-
-    => meminfo
-    DRAM:  256 MiB
+``CONFIG_CMD_MEMINFO_MAP`` enabled for aarch64 qemu::
+
+    DRAM:  8 GiB
+    Walking pagetable at 000000023ffe0000, va_bits: 40. Using 4 levels
+    [0x0000023ffe1000]                          |  Table |            |               |
+      [0x0000023ffe2000]                        |  Table |            |               |
+        [0x00000000000000 - 0x00000008000000]   |  Block | RWX        | Normal        | Inner-shareable
+        [0x00000008000000 - 0x00000040000000]   |  Block | PXN UXN    | Device-nGnRnE | Non-shareable
+      [0x00000040000000 - 0x00000200000000]     |  Block | RWX        | Normal        | Inner-shareable
+      [0x0000023ffea000]                        |  Table |            |               |
+        [0x00000200000000 - 0x0000023f600000]   |  Block | RWX        | Normal        | Inner-shareable
+        [0x0000023ffeb000]                      |  Table |            |               |
+          [0x0000023f600000 - 0x0000023f68c000] |  Pages | RWX        | Normal        | Inner-shareable
+          [0x0000023f68c000 - 0x0000023f74f000] |  Pages | RO         | Normal        | Inner-shareable
+          [0x0000023f74f000 - 0x0000023f794000] |  Pages | PXN UXN RO | Normal        | Inner-shareable
+          [0x0000023f794000 - 0x0000023f79d000] |  Pages | PXN UXN    | Normal        | Inner-shareable
+          [0x0000023f79d000 - 0x0000023f800000] |  Pages | RWX        | Normal        | Inner-shareable
+        [0x0000023f800000 - 0x00000240000000]   |  Block | RWX        | Normal        | Inner-shareable
+      [0x00000240000000 - 0x00004000000000]     |  Block | RWX        | Normal        | Inner-shareable
+      [0x0000023ffe3000]                        |  Table |            |               |
+        [0x00004010000000 - 0x00004020000000]   |  Block | PXN UXN    | Device-nGnRnE | Non-shareable
+    [0x0000023ffe4000]                          |  Table |            |               |
+      [0x00008000000000 - 0x00010000000000]     |  Block | PXN UXN    | Device-nGnRnE | Non-shareable
 
     Region           Base     Size      End      Gap
     ------------------------------------------------
-    video         f000000  1000000 10000000
-    code          ec3a000   3c5d28  efffd28      2d8
-    malloc        8c38000  6002000  ec3a000        0
-    board_info    8c37f90       68  8c37ff8        8
-    global_data   8c37d80      208  8c37f88        8
-    devicetree    8c33000     4d7d  8c37d7d        3
-    bootstage     8c32c20      3c8  8c32fe8       18
-    bloblist      8c32000      400  8c32400      820
-    stack         7c31ff0  1000000  8c31ff0       10
-    free                0  7c31ff0  7c31ff0        0
-
+    video        23f7e0000   800000 23ffe0000
+    code         23f68a000   156000 23f7e0000        0
+    malloc       23e64a000  1040000 23f68a000        0
+    board_info   23e649f80       78 23e649ff8        8
+    global_data  23e649df0      188 23e649f78        8
+    devicetree   23e549df0   100000 23e649df0        0
+    bloblist     23e547000     2000 23e549000      df0
+    stack        23d546ff0  1000000 23e546ff0       10
+    lmb          23d546ff0        0 23d546ff0        0
+    lmb          23d543000     3ff0 23d546ff0        0
+    free         40000000 23d543000 27d543000 ffffffffc0000000
 
 Return value
 ------------