@@ -972,11 +972,14 @@ void mmu_set_region_dcache_behaviour(phys_addr_t start, size_t size,
* The procecess is break-before-make. The target region will be marked as
* invalid during the process of changing.
*/
-void mmu_change_region_attr(phys_addr_t addr, size_t siz, u64 attrs)
+void mmu_change_region_attr(phys_addr_t addr, size_t siz, u64 attrs, bool bbm)
{
int level;
u64 r, size, start;
+ if (!bbm)
+ goto skip_break;
+
start = addr;
size = siz;
/*
@@ -1001,6 +1004,7 @@ void mmu_change_region_attr(phys_addr_t addr, size_t siz, u64 attrs)
gd->arch.tlb_addr + gd->arch.tlb_size);
__asm_invalidate_tlb_all();
+skip_break:
/*
* Loop through the address range until we find a page granule that fits
* our alignment constraints, then set it to the new cache attributes
@@ -1573,7 +1573,7 @@ void update_early_mmu_table(void)
PTE_BLOCK_MEMTYPE(MT_NORMAL) |
PTE_BLOCK_OUTER_SHARE |
PTE_BLOCK_NS |
- PTE_TYPE_VALID);
+ PTE_TYPE_VALID, true);
} else {
mmu_change_region_attr(
CFG_SYS_SDRAM_BASE,
@@ -1581,7 +1581,7 @@ void update_early_mmu_table(void)
PTE_BLOCK_MEMTYPE(MT_NORMAL) |
PTE_BLOCK_OUTER_SHARE |
PTE_BLOCK_NS |
- PTE_TYPE_VALID);
+ PTE_TYPE_VALID, true);
#ifdef CONFIG_SYS_DDR_BLOCK3_BASE
#ifndef CONFIG_SYS_DDR_BLOCK2_SIZE
#error "Missing CONFIG_SYS_DDR_BLOCK2_SIZE"
@@ -1594,7 +1594,7 @@ void update_early_mmu_table(void)
PTE_BLOCK_MEMTYPE(MT_NORMAL) |
PTE_BLOCK_OUTER_SHARE |
PTE_BLOCK_NS |
- PTE_TYPE_VALID);
+ PTE_TYPE_VALID, true);
mmu_change_region_attr(
CONFIG_SYS_DDR_BLOCK3_BASE,
gd->ram_size -
@@ -1603,7 +1603,7 @@ void update_early_mmu_table(void)
PTE_BLOCK_MEMTYPE(MT_NORMAL) |
PTE_BLOCK_OUTER_SHARE |
PTE_BLOCK_NS |
- PTE_TYPE_VALID);
+ PTE_TYPE_VALID, true);
} else
#endif
{
@@ -1614,7 +1614,7 @@ void update_early_mmu_table(void)
PTE_BLOCK_MEMTYPE(MT_NORMAL) |
PTE_BLOCK_OUTER_SHARE |
PTE_BLOCK_NS |
- PTE_TYPE_VALID);
+ PTE_TYPE_VALID, true);
}
}
}
@@ -287,7 +287,16 @@ void flush_l3_cache(void);
* @emerg: Also map the region in the emergency table
*/
void mmu_map_region(phys_addr_t start, u64 size, bool emerg);
-void mmu_change_region_attr(phys_addr_t start, size_t size, u64 attrs);
+
+/**
+ * mmu_change_region_attr() - change a mapped region attributes
+ *
+ * @start: Start address of the region
+ * @size: Size of the region
+ * @aatrs: New attributes
+ * @bbm: Perform a break-before-make on the page tables entries
+ */
+void mmu_change_region_attr(phys_addr_t start, size_t size, u64 attrs, bool bbm);
/*
* smc_call() - issue a secure monitor call
@@ -577,7 +577,7 @@ static void carve_out_reserved_memory(void)
if (i == count || start + size < res[i].start - SZ_2M) {
debug(" 0x%016llx - 0x%016llx: reserved\n",
start, start + size);
- mmu_change_region_attr(start, size, PTE_TYPE_FAULT);
+ mmu_change_region_attr(start, size, PTE_TYPE_FAULT, true);
/* If this is the final region then quit here before we index
* out of bounds...
*/
The ARM ARM on section 8.17.1 describes the cases where break-before-make is required when changing live page tables. Since we can use this function to tweak block and page permssions, where BBM is not required add an extra argument to the function. While at it add a function description. Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org> --- arch/arm/cpu/armv8/cache_v8.c | 6 +++++- arch/arm/cpu/armv8/fsl-layerscape/cpu.c | 10 +++++----- arch/arm/include/asm/system.h | 11 ++++++++++- arch/arm/mach-snapdragon/board.c | 2 +- 4 files changed, 21 insertions(+), 8 deletions(-)