| Message ID | 20250217-sar2130p-pci-v1-1-94b20ec70a14@linaro.org |
|---|---|
| State | New |
| Headers | show |
| Series | [1/6] dt-bindings: PCI: qcom-ep: describe optional IOMMU | expand |
diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie-ep.yaml b/Documentation/devicetree/bindings/pci/qcom,pcie-ep.yaml index 1226ee5d08d1ae909b07b0d78014618c4c74e9a8..800accdf5947e7178ad80f0759cf53111be1a814 100644 --- a/Documentation/devicetree/bindings/pci/qcom,pcie-ep.yaml +++ b/Documentation/devicetree/bindings/pci/qcom,pcie-ep.yaml @@ -75,6 +75,9 @@ properties: - const: doorbell - const: dma + iommus: + maxItems: 1 + reset-gpios: description: GPIO used as PERST# input signal maxItems: 1 @@ -233,6 +236,20 @@ allOf: minItems: 3 maxItems: 3 + - if: + properties: + compatible: + contains: + const: qcom,sdx55-pcie-ep + then: + properties: + iommus: + false + + else: + required: + - iommus + unevaluatedProperties: false examples:
Platforms which use eDMA for PCIe EP transfers (like SA8775P) also use IOMMU in order to setup transfer windows. Fix the schema in order to allow specifying the IOMMU. Fixes: 9d3d5e75f31c ("dt-bindings: PCI: qcom-ep: Add support for SA8775P SoC") Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> --- Documentation/devicetree/bindings/pci/qcom,pcie-ep.yaml | 17 +++++++++++++++++ 1 file changed, 17 insertions(+)