diff mbox series

[1/4] target/ppc: drop ppc_tlb_invalidate_all from cpu_reset

Message ID 20250225184628.3590671-2-alex.bennee@linaro.org
State New
Headers show
Series cputlb: add tlb_flush_other_cpu | expand

Commit Message

Alex Bennée Feb. 25, 2025, 6:46 p.m. UTC 
The vCPU parent already triggers a tb_flush so this is un-needed:

  #0  tlb_flush_other_cpu (cpu=0x555556df8630) at ../../accel/tcg/cputlb.c:419
  #1  0x0000555555ee38c9 in tcg_cpu_reset_hold (cpu=0x555556df8630) at ../../accel/tcg/tcg-accel-ops.c:88
  #2  0x0000555555bc29e5 in cpu_exec_reset_hold (cpu=0x555556df8630) at ../../system/cpus.c:208
  #3  0x00005555558932c3 in cpu_common_reset_hold (obj=0x555556df8630, type=RESET_TYPE_COLD) at ../../hw/core/cpu-common.c:139
  #4  0x0000555555d480b1 in ppc_cpu_reset_hold (obj=0x555556df8630, type=RESET_TYPE_COLD) at ../../target/ppc/cpu_init.c:7200
  #5  0x0000555555ef28f0 in resettable_phase_hold (obj=0x555556df8630, opaque=0x0, type=RESET_TYPE_COLD) at ../../hw/core/resettable.c:162
  #6  0x0000555555ef24f4 in resettable_assert_reset (obj=0x555556df8630, type=RESET_TYPE_COLD) at ../../hw/core/resettable.c:58
  #7  0x0000555555ef244c in resettable_reset (obj=0x555556df8630, type=RESET_TYPE_COLD) at ../../hw/core/resettable.c:45
  #8  0x0000555555eef525 in device_cold_reset (dev=0x555556df8630) at ../../hw/core/qdev.c:239
  #9  0x00005555558931ab in cpu_reset (cpu=0x555556df8630) at ../../hw/core/cpu-common.c:114
  #10 0x0000555555d1ec6b in ppce500_cpu_reset (opaque=0x555556df8630) at ../../hw/ppc/e500.c:785
  #11 0x000055555595c410 in legacy_reset_hold (obj=0x555556e6bbc0, type=RESET_TYPE_COLD) at ../../hw/core/reset.c:76
  #12 0x0000555555ef28f0 in resettable_phase_hold (obj=0x555556e6bbc0, opaque=0x0, type=RESET_TYPE_COLD) at ../../hw/core/resettable.c:162

Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
---
 target/ppc/cpu_init.c | 3 ---
 1 file changed, 3 deletions(-)

Comments

Richard Henderson Feb. 25, 2025, 7:32 p.m. UTC | #1 
On 2/25/25 10:46, Alex Bennée wrote:
> diff --git a/target/ppc/cpu_init.c b/target/ppc/cpu_init.c
> index 062a6e85fb..f987b75c4f 100644
> --- a/target/ppc/cpu_init.c
> +++ b/target/ppc/cpu_init.c
> @@ -7242,9 +7242,6 @@ static void ppc_cpu_reset_hold(Object *obj, ResetType type)
>       if (tcg_enabled()) {
>           cpu_breakpoint_remove_all(cs, BP_CPU);
>           cpu_watchpoint_remove_all(cs, BP_CPU);
> -        if (env->mmu_model != POWERPC_MMU_REAL) {
> -            ppc_tlb_invalidate_all(env);
> -        }
>           pmu_mmcr01a_updated(env);
>       }
>   

Nack.  This is flushing the thing emulating the on-chip hardware, not the softmmu tlb.


r~
diff mbox series

Patch

diff --git a/target/ppc/cpu_init.c b/target/ppc/cpu_init.c
index 062a6e85fb..f987b75c4f 100644
--- a/target/ppc/cpu_init.c
+++ b/target/ppc/cpu_init.c
@@ -7242,9 +7242,6 @@  static void ppc_cpu_reset_hold(Object *obj, ResetType type)
     if (tcg_enabled()) {
         cpu_breakpoint_remove_all(cs, BP_CPU);
         cpu_watchpoint_remove_all(cs, BP_CPU);
-        if (env->mmu_model != POWERPC_MMU_REAL) {
-            ppc_tlb_invalidate_all(env);
-        }
         pmu_mmcr01a_updated(env);
     }