diff mbox series

[RFC,06/18] hw/mips/mipssim: Replace TARGET_MIPS64 by legacy_binary_is_64bit()

Message ID 20250305153929.43687-7-philmd@linaro.org
State New
Headers show
Series hw/microblaze: Quick single binary proof of concept | expand

Commit Message

Philippe Mathieu-Daudé March 5, 2025, 3:39 p.m. UTC 
For legacy MIPS binaries, legacy_binary_is_64bit() is
equivalent of the compile time TARGET_MIPS64 definition.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
 hw/mips/mipssim.c | 15 +++++----------
 1 file changed, 5 insertions(+), 10 deletions(-)
diff mbox series

Patch

diff --git a/hw/mips/mipssim.c b/hw/mips/mipssim.c
index c530688e769..f94dbdc428b 100644
--- a/hw/mips/mipssim.c
+++ b/hw/mips/mipssim.c
@@ -28,6 +28,7 @@ 
 #include "qemu/osdep.h"
 #include "qapi/error.h"
 #include "qemu/datadir.h"
+#include "qemu/legacy_binary_info.h"
 #include "exec/address-spaces.h"
 #include "hw/clock.h"
 #include "hw/mips/mips.h"
@@ -152,13 +153,10 @@  mips_mipssim_init(MachineState *machine)
     CPUMIPSState *env;
     ResetData *reset_info;
     int bios_size;
+    unsigned clock_hz = (legacy_binary_is_64bit() ? 6 : 12) * 1000 * 1000;
 
     cpuclk = clock_new(OBJECT(machine), "cpu-refclk");
-#ifdef TARGET_MIPS64
-    clock_set_hz(cpuclk, 6000000); /* 6 MHz */
-#else
-    clock_set_hz(cpuclk, 12000000); /* 12 MHz */
-#endif
+    clock_set_hz(cpuclk, clock_hz);
 
     /* Init CPUs. */
     cpu = mips_cpu_create_with_clock(machine->cpu_type, cpuclk,
@@ -241,11 +239,8 @@  static void mips_mipssim_machine_init(MachineClass *mc)
 {
     mc->desc = "MIPS MIPSsim platform";
     mc->init = mips_mipssim_init;
-#ifdef TARGET_MIPS64
-    mc->default_cpu_type = MIPS_CPU_TYPE_NAME("5Kf");
-#else
-    mc->default_cpu_type = MIPS_CPU_TYPE_NAME("24Kf");
-#endif
+    mc->default_cpu_type = legacy_binary_is_64bit() ? MIPS_CPU_TYPE_NAME("5Kf")
+                                                    : MIPS_CPU_TYPE_NAME("24Kf");
     mc->default_ram_id = "mips_mipssim.ram";
 }