| Message ID | 20250304-sm8750_bwmon_master-v3-1-01a5cb330dd9@quicinc.com |
|---|---|
| State | New |
| Headers | show |
| Series | [v3] arm64: dts: qcom: sm8750: Add BWMONs | expand |
On 5.03.2025 1:33 AM, Melody Olvera wrote: > From: Shivnandan Kumar <quic_kshivnan@quicinc.com> > > Add the CPU BWMONs for SM8750 SoCs. > > Signed-off-by: Shivnandan Kumar <quic_kshivnan@quicinc.com> > Signed-off-by: Melody Olvera <quic_molvera@quicinc.com> > --- > Changes in v3: > - Change cluster 1 destination interconnect to tag active only from tag > always > - Link to v2: https://lore.kernel.org/r/20250304-sm8750_bwmon_master-v2-1-ead16909397d@quicinc.com > > Changes in v2: > - Change destination interconnect to tag active only from tag always > - Link to v1: https://lore.kernel.org/r/20250113-sm8750_bwmon_master-v1-0-f082da3a3308@quicinc.com > --- This looks good, but I found that this platform may require some more changes for bwmon, we're investigating that Konrad
On Sat, Mar 08, 2025 at 07:15:06PM +0100, Konrad Dybcio wrote: > On 5.03.2025 1:33 AM, Melody Olvera wrote: > > From: Shivnandan Kumar <quic_kshivnan@quicinc.com> > > > > Add the CPU BWMONs for SM8750 SoCs. > > > > Signed-off-by: Shivnandan Kumar <quic_kshivnan@quicinc.com> > > Signed-off-by: Melody Olvera <quic_molvera@quicinc.com> > > --- > > Changes in v3: > > - Change cluster 1 destination interconnect to tag active only from tag > > always > > - Link to v2: https://lore.kernel.org/r/20250304-sm8750_bwmon_master-v2-1-ead16909397d@quicinc.com > > > > Changes in v2: > > - Change destination interconnect to tag active only from tag always > > - Link to v1: https://lore.kernel.org/r/20250113-sm8750_bwmon_master-v1-0-f082da3a3308@quicinc.com > > --- > > This looks good, but I found that this platform may require some more > changes for bwmon, we're investigating that > Did we reach a conclusion on this? Regards, Bjorn > Konrad
On 5/18/25 12:37 AM, Bjorn Andersson wrote: > On Sat, Mar 08, 2025 at 07:15:06PM +0100, Konrad Dybcio wrote: >> On 5.03.2025 1:33 AM, Melody Olvera wrote: >>> From: Shivnandan Kumar <quic_kshivnan@quicinc.com> >>> >>> Add the CPU BWMONs for SM8750 SoCs. >>> >>> Signed-off-by: Shivnandan Kumar <quic_kshivnan@quicinc.com> >>> Signed-off-by: Melody Olvera <quic_molvera@quicinc.com> >>> --- >>> Changes in v3: >>> - Change cluster 1 destination interconnect to tag active only from tag >>> always >>> - Link to v2: https://lore.kernel.org/r/20250304-sm8750_bwmon_master-v2-1-ead16909397d@quicinc.com >>> >>> Changes in v2: >>> - Change destination interconnect to tag active only from tag always >>> - Link to v1: https://lore.kernel.org/r/20250113-sm8750_bwmon_master-v1-0-f082da3a3308@quicinc.com >>> --- >> >> This looks good, but I found that this platform may require some more >> changes for bwmon, we're investigating that >> > > Did we reach a conclusion on this? Yes. Melody, LMK whether you want to proceed or want me to resubmit with the necessary change Konrad
diff --git a/arch/arm64/boot/dts/qcom/sm8750.dtsi b/arch/arm64/boot/dts/qcom/sm8750.dtsi index 3bbd7d18598ee0a3a0d5130c03a3166e1fc14d82..68ca2ad44975ee0b12e5e939d678b407080e2dc5 100644 --- a/arch/arm64/boot/dts/qcom/sm8750.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8750.dtsi @@ -2802,6 +2802,80 @@ rpmhpd_opp_super_turbo_no_cpr: opp-480 { }; }; + /* cluster0 */ + pmu@240b3400 { + compatible = "qcom,sm8750-cpu-bwmon", "qcom,sdm845-bwmon"; + reg = <0x0 0x240b3400 0x0 0x600>; + + interrupts = <GIC_SPI 581 IRQ_TYPE_LEVEL_HIGH>; + + interconnects = <&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY + &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ACTIVE_ONLY>; + + operating-points-v2 = <&cpu_bwmon_opp_table>; + + cpu_bwmon_opp_table: opp-table { + compatible = "operating-points-v2"; + + opp-0 { + opp-peak-kBps = <800000>; + }; + + opp-1 { + opp-peak-kBps = <2188000>; + }; + + opp-2 { + opp-peak-kBps = <5414400>; + }; + + opp-3 { + opp-peak-kBps = <6220800>; + }; + + opp-4 { + opp-peak-kBps = <6835200>; + }; + + opp-5 { + opp-peak-kBps = <8371200>; + }; + + opp-6 { + opp-peak-kBps = <10944000>; + }; + + opp-7 { + opp-peak-kBps = <12748800>; + }; + + opp-8 { + opp-peak-kBps = <14745600>; + }; + + opp-9 { + opp-peak-kBps = <16896000>; + }; + + opp-10 { + opp-peak-kBps = <19046400>; + }; + }; + }; + + /* cluster1 */ + pmu@240b7400 { + compatible = "qcom,sm8750-cpu-bwmon", "qcom,sdm845-bwmon"; + reg = <0x0 0x240b7400 0x0 0x600>; + + interrupts = <GIC_SPI 581 IRQ_TYPE_LEVEL_HIGH>; + + interconnects = <&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY + &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ACTIVE_ONLY>; + + operating-points-v2 = <&cpu_bwmon_opp_table>; + }; + timer@16800000 { compatible = "arm,armv7-timer-mem"; reg = <0x0 0x16800000 0x0 0x1000>;