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[PATCH-for-10.1] target/i386: Replace MO_TE -> MO_LE

Message ID 20250312103818.370-1-philmd@linaro.org
State Superseded
Headers show
Series [PATCH-for-10.1] target/i386: Replace MO_TE -> MO_LE | expand

Commit Message

Philippe Mathieu-Daudé March 12, 2025, 10:38 a.m. UTC
The x86 architecture is only implemented as little-endian.
The MO_TE definition always expands to MO_LE.

Replace:
 - MO_TEUQ -> MO_LE | MO_UQ
 - MO_TE   -> MO_LE

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
 target/i386/tcg/emit.c.inc | 7 ++++---
 1 file changed, 4 insertions(+), 3 deletions(-)

Comments

Richard Henderson March 12, 2025, 12:52 p.m. UTC | #1
On 3/12/25 03:38, Philippe Mathieu-Daudé wrote:
> The x86 architecture is only implemented as little-endian.
> The MO_TE definition always expands to MO_LE.
> 
> Replace:
>   - MO_TEUQ -> MO_LE | MO_UQ
>   - MO_TE   -> MO_LE
> 
> Signed-off-by: Philippe Mathieu-Daudé<philmd@linaro.org>
> ---
>   target/i386/tcg/emit.c.inc | 7 ++++---
>   1 file changed, 4 insertions(+), 3 deletions(-)

Is there a reason not to use MO_LEUQ?  Anyway,

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>


r~
Philippe Mathieu-Daudé March 12, 2025, 2:13 p.m. UTC | #2
On 12/3/25 13:52, Richard Henderson wrote:
> On 3/12/25 03:38, Philippe Mathieu-Daudé wrote:
>> The x86 architecture is only implemented as little-endian.
>> The MO_TE definition always expands to MO_LE.
>>
>> Replace:
>>   - MO_TEUQ -> MO_LE | MO_UQ
>>   - MO_TE   -> MO_LE
>>
>> Signed-off-by: Philippe Mathieu-Daudé<philmd@linaro.org>
>> ---
>>   target/i386/tcg/emit.c.inc | 7 ++++---
>>   1 file changed, 4 insertions(+), 3 deletions(-)
> 
> Is there a reason not to use MO_LEUQ?

No, I'll respin using it.

>  Anyway,
> 
> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>

Thanks!
diff mbox series

Patch

diff --git a/target/i386/tcg/emit.c.inc b/target/i386/tcg/emit.c.inc
index 0fa1664a24f..c7a40a2f9e4 100644
--- a/target/i386/tcg/emit.c.inc
+++ b/target/i386/tcg/emit.c.inc
@@ -1796,7 +1796,7 @@  static void gen_CMPXCHG(DisasContext *s, X86DecodedInsn *decode)
 static void gen_CMPXCHG16B(DisasContext *s, X86DecodedInsn *decode)
 {
 #ifdef TARGET_X86_64
-    MemOp mop = MO_TE | MO_128 | MO_ALIGN;
+    MemOp mop = MO_LE | MO_128 | MO_ALIGN;
     TCGv_i64 t0, t1;
     TCGv_i128 cmp, val;
 
@@ -1853,10 +1853,11 @@  static void gen_CMPXCHG8B(DisasContext *s, X86DecodedInsn *decode)
 
     /* Only require atomic with LOCK; non-parallel handled in generator. */
     if (s->prefix & PREFIX_LOCK) {
-        tcg_gen_atomic_cmpxchg_i64(old, s->A0, cmp, val, s->mem_index, MO_TEUQ);
+        tcg_gen_atomic_cmpxchg_i64(old, s->A0, cmp, val,
+                                   s->mem_index, MO_LE | MO_UQ);
     } else {
         tcg_gen_nonatomic_cmpxchg_i64(old, s->A0, cmp, val,
-                                      s->mem_index, MO_TEUQ);
+                                      s->mem_index, MO_LE | MO_UQ);
     }
 
     /* Set tmp0 to match the required value of Z. */