| Message ID | 20250508133550.81391-20-philmd@linaro.org |
|---|---|
| State | New |
| Headers | show |
| Series | hw/i386/pc: Remove deprecated 2.6 and 2.7 PC machines | expand |
On Thu, May 08, 2025 at 03:35:42PM +0200, Philippe Mathieu-Daudé wrote: > Date: Thu, 8 May 2025 15:35:42 +0200 > From: Philippe Mathieu-Daudé <philmd@linaro.org> > Subject: [PATCH v4 19/27] target/i386/cpu: Remove > CPUX86State::full_cpuid_auto_level field > X-Mailer: git-send-email 2.47.1 > > The CPUX86State::full_cpuid_auto_level boolean was only > disabled for the pc-q35-2.7 and pc-i440fx-2.7 machines, > which got removed. Being now always %true, we can remove > it and simplify x86_cpu_expand_features(). > > Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> > --- > target/i386/cpu.h | 3 -- > target/i386/cpu.c | 106 ++++++++++++++++++++++------------------------ > 2 files changed, 51 insertions(+), 58 deletions(-) This property is a fix, so, Reviewed-by: Zhao Liu <zhao1.liu@intel.com>
On Thu, 8 May 2025 15:35:42 +0200 Philippe Mathieu-Daudé <philmd@linaro.org> wrote: > The CPUX86State::full_cpuid_auto_level boolean was only > disabled for the pc-q35-2.7 and pc-i440fx-2.7 machines, > which got removed. Being now always %true, we can remove > it and simplify x86_cpu_expand_features(). I've found field being mentioned only by some external rust library, that's likely shouldn't concern QEMU qemu though. I'm not confident enough to ack it but I won't object either > Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> > --- > target/i386/cpu.h | 3 -- > target/i386/cpu.c | 106 ++++++++++++++++++++++------------------------ > 2 files changed, 51 insertions(+), 58 deletions(-) > > diff --git a/target/i386/cpu.h b/target/i386/cpu.h > index 7585407da54..b5cbd91c156 100644 > --- a/target/i386/cpu.h > +++ b/target/i386/cpu.h > @@ -2241,9 +2241,6 @@ struct ArchCPU { > */ > bool legacy_multi_node; > > - /* Enable auto level-increase for all CPUID leaves */ > - bool full_cpuid_auto_level; > - > /* Only advertise CPUID leaves defined by the vendor */ > bool vendor_cpuid_only; > > diff --git a/target/i386/cpu.c b/target/i386/cpu.c > index fb505d13122..6b9a1f2251a 100644 > --- a/target/i386/cpu.c > +++ b/target/i386/cpu.c > @@ -7843,68 +7843,65 @@ void x86_cpu_expand_features(X86CPU *cpu, Error **errp) > > /* CPUID[EAX=7,ECX=0].EBX always increased level automatically: */ > x86_cpu_adjust_feat_level(cpu, FEAT_7_0_EBX); > - if (cpu->full_cpuid_auto_level) { > - x86_cpu_adjust_feat_level(cpu, FEAT_1_EDX); > - x86_cpu_adjust_feat_level(cpu, FEAT_1_ECX); > - x86_cpu_adjust_feat_level(cpu, FEAT_6_EAX); > - x86_cpu_adjust_feat_level(cpu, FEAT_7_0_ECX); > - x86_cpu_adjust_feat_level(cpu, FEAT_7_1_EAX); > - x86_cpu_adjust_feat_level(cpu, FEAT_7_1_EDX); > - x86_cpu_adjust_feat_level(cpu, FEAT_7_2_EDX); > - x86_cpu_adjust_feat_level(cpu, FEAT_8000_0001_EDX); > - x86_cpu_adjust_feat_level(cpu, FEAT_8000_0001_ECX); > - x86_cpu_adjust_feat_level(cpu, FEAT_8000_0007_EDX); > - x86_cpu_adjust_feat_level(cpu, FEAT_8000_0008_EBX); > - x86_cpu_adjust_feat_level(cpu, FEAT_C000_0001_EDX); > - x86_cpu_adjust_feat_level(cpu, FEAT_SVM); > - x86_cpu_adjust_feat_level(cpu, FEAT_XSAVE); > + x86_cpu_adjust_feat_level(cpu, FEAT_1_EDX); > + x86_cpu_adjust_feat_level(cpu, FEAT_1_ECX); > + x86_cpu_adjust_feat_level(cpu, FEAT_6_EAX); > + x86_cpu_adjust_feat_level(cpu, FEAT_7_0_ECX); > + x86_cpu_adjust_feat_level(cpu, FEAT_7_1_EAX); > + x86_cpu_adjust_feat_level(cpu, FEAT_7_1_EDX); > + x86_cpu_adjust_feat_level(cpu, FEAT_7_2_EDX); > + x86_cpu_adjust_feat_level(cpu, FEAT_8000_0001_EDX); > + x86_cpu_adjust_feat_level(cpu, FEAT_8000_0001_ECX); > + x86_cpu_adjust_feat_level(cpu, FEAT_8000_0007_EDX); > + x86_cpu_adjust_feat_level(cpu, FEAT_8000_0008_EBX); > + x86_cpu_adjust_feat_level(cpu, FEAT_C000_0001_EDX); > + x86_cpu_adjust_feat_level(cpu, FEAT_SVM); > + x86_cpu_adjust_feat_level(cpu, FEAT_XSAVE); > > - /* Intel Processor Trace requires CPUID[0x14] */ > - if ((env->features[FEAT_7_0_EBX] & CPUID_7_0_EBX_INTEL_PT)) { > - if (cpu->intel_pt_auto_level) { > - x86_cpu_adjust_level(cpu, &cpu->env.cpuid_min_level, 0x14); > - } else if (cpu->env.cpuid_min_level < 0x14) { > - mark_unavailable_features(cpu, FEAT_7_0_EBX, > - CPUID_7_0_EBX_INTEL_PT, > - "Intel PT need CPUID leaf 0x14, please set by \"-cpu ...,intel-pt=on,min-level=0x14\""); > - } > + /* Intel Processor Trace requires CPUID[0x14] */ > + if ((env->features[FEAT_7_0_EBX] & CPUID_7_0_EBX_INTEL_PT)) { > + if (cpu->intel_pt_auto_level) { > + x86_cpu_adjust_level(cpu, &cpu->env.cpuid_min_level, 0x14); > + } else if (cpu->env.cpuid_min_level < 0x14) { > + mark_unavailable_features(cpu, FEAT_7_0_EBX, CPUID_7_0_EBX_INTEL_PT, > + "Intel PT need CPUID leaf 0x14, please set by \"-cpu ...,intel-pt=on,min-level=0x14\""); > } > + } > > - /* > - * Intel CPU topology with multi-dies support requires CPUID[0x1F]. > - * For AMD Rome/Milan, cpuid level is 0x10, and guest OS should detect > - * extended toplogy by leaf 0xB. Only adjust it for Intel CPU, unless > - * cpu->vendor_cpuid_only has been unset for compatibility with older > - * machine types. > - */ > - if (x86_has_extended_topo(env->avail_cpu_topo) && > - (IS_INTEL_CPU(env) || !cpu->vendor_cpuid_only)) { > - x86_cpu_adjust_level(cpu, &env->cpuid_min_level, 0x1F); > - } > + /* > + * Intel CPU topology with multi-dies support requires CPUID[0x1F]. > + * For AMD Rome/Milan, cpuid level is 0x10, and guest OS should detect > + * extended toplogy by leaf 0xB. Only adjust it for Intel CPU, unless > + * cpu->vendor_cpuid_only has been unset for compatibility with older > + * machine types. > + */ > + if (x86_has_extended_topo(env->avail_cpu_topo) && > + (IS_INTEL_CPU(env) || !cpu->vendor_cpuid_only)) { > + x86_cpu_adjust_level(cpu, &env->cpuid_min_level, 0x1F); > + } > > - /* Advanced Vector Extensions 10 (AVX10) requires CPUID[0x24] */ > - if (env->features[FEAT_7_1_EDX] & CPUID_7_1_EDX_AVX10) { > - x86_cpu_adjust_level(cpu, &env->cpuid_min_level, 0x24); > - } > + /* Advanced Vector Extensions 10 (AVX10) requires CPUID[0x24] */ > + if (env->features[FEAT_7_1_EDX] & CPUID_7_1_EDX_AVX10) { > + x86_cpu_adjust_level(cpu, &env->cpuid_min_level, 0x24); > + } > > - /* SVM requires CPUID[0x8000000A] */ > - if (env->features[FEAT_8000_0001_ECX] & CPUID_EXT3_SVM) { > - x86_cpu_adjust_level(cpu, &env->cpuid_min_xlevel, 0x8000000A); > - } > + /* SVM requires CPUID[0x8000000A] */ > + if (env->features[FEAT_8000_0001_ECX] & CPUID_EXT3_SVM) { > + x86_cpu_adjust_level(cpu, &env->cpuid_min_xlevel, 0x8000000A); > + } > > - /* SEV requires CPUID[0x8000001F] */ > - if (sev_enabled()) { > - x86_cpu_adjust_level(cpu, &env->cpuid_min_xlevel, 0x8000001F); > - } > + /* SEV requires CPUID[0x8000001F] */ > + if (sev_enabled()) { > + x86_cpu_adjust_level(cpu, &env->cpuid_min_xlevel, 0x8000001F); > + } > > - if (env->features[FEAT_8000_0021_EAX]) { > - x86_cpu_adjust_level(cpu, &env->cpuid_min_xlevel, 0x80000021); > - } > + if (env->features[FEAT_8000_0021_EAX]) { > + x86_cpu_adjust_level(cpu, &env->cpuid_min_xlevel, 0x80000021); > + } > > - /* SGX requires CPUID[0x12] for EPC enumeration */ > - if (env->features[FEAT_7_0_EBX] & CPUID_7_0_EBX_SGX) { > - x86_cpu_adjust_level(cpu, &env->cpuid_min_level, 0x12); > - } > + /* SGX requires CPUID[0x12] for EPC enumeration */ > + if (env->features[FEAT_7_0_EBX] & CPUID_7_0_EBX_SGX) { > + x86_cpu_adjust_level(cpu, &env->cpuid_min_level, 0x12); > } > > /* Set cpuid_*level* based on cpuid_min_*level, if not explicitly set */ > @@ -8820,7 +8817,6 @@ static const Property x86_cpu_properties[] = { > DEFINE_PROP_UINT32("min-xlevel2", X86CPU, env.cpuid_min_xlevel2, 0), > DEFINE_PROP_UINT8("avx10-version", X86CPU, env.avx10_version, 0), > DEFINE_PROP_UINT64("ucode-rev", X86CPU, ucode_rev, 0), > - DEFINE_PROP_BOOL("full-cpuid-auto-level", X86CPU, full_cpuid_auto_level, true), > DEFINE_PROP_STRING("hv-vendor-id", X86CPU, hyperv_vendor), > DEFINE_PROP_BOOL("x-vendor-cpuid-only", X86CPU, vendor_cpuid_only, true), > DEFINE_PROP_BOOL("x-amd-topoext-features-only", X86CPU, amd_topoext_features_only, true),
diff --git a/target/i386/cpu.h b/target/i386/cpu.h index 7585407da54..b5cbd91c156 100644 --- a/target/i386/cpu.h +++ b/target/i386/cpu.h @@ -2241,9 +2241,6 @@ struct ArchCPU { */ bool legacy_multi_node; - /* Enable auto level-increase for all CPUID leaves */ - bool full_cpuid_auto_level; - /* Only advertise CPUID leaves defined by the vendor */ bool vendor_cpuid_only; diff --git a/target/i386/cpu.c b/target/i386/cpu.c index fb505d13122..6b9a1f2251a 100644 --- a/target/i386/cpu.c +++ b/target/i386/cpu.c @@ -7843,68 +7843,65 @@ void x86_cpu_expand_features(X86CPU *cpu, Error **errp) /* CPUID[EAX=7,ECX=0].EBX always increased level automatically: */ x86_cpu_adjust_feat_level(cpu, FEAT_7_0_EBX); - if (cpu->full_cpuid_auto_level) { - x86_cpu_adjust_feat_level(cpu, FEAT_1_EDX); - x86_cpu_adjust_feat_level(cpu, FEAT_1_ECX); - x86_cpu_adjust_feat_level(cpu, FEAT_6_EAX); - x86_cpu_adjust_feat_level(cpu, FEAT_7_0_ECX); - x86_cpu_adjust_feat_level(cpu, FEAT_7_1_EAX); - x86_cpu_adjust_feat_level(cpu, FEAT_7_1_EDX); - x86_cpu_adjust_feat_level(cpu, FEAT_7_2_EDX); - x86_cpu_adjust_feat_level(cpu, FEAT_8000_0001_EDX); - x86_cpu_adjust_feat_level(cpu, FEAT_8000_0001_ECX); - x86_cpu_adjust_feat_level(cpu, FEAT_8000_0007_EDX); - x86_cpu_adjust_feat_level(cpu, FEAT_8000_0008_EBX); - x86_cpu_adjust_feat_level(cpu, FEAT_C000_0001_EDX); - x86_cpu_adjust_feat_level(cpu, FEAT_SVM); - x86_cpu_adjust_feat_level(cpu, FEAT_XSAVE); + x86_cpu_adjust_feat_level(cpu, FEAT_1_EDX); + x86_cpu_adjust_feat_level(cpu, FEAT_1_ECX); + x86_cpu_adjust_feat_level(cpu, FEAT_6_EAX); + x86_cpu_adjust_feat_level(cpu, FEAT_7_0_ECX); + x86_cpu_adjust_feat_level(cpu, FEAT_7_1_EAX); + x86_cpu_adjust_feat_level(cpu, FEAT_7_1_EDX); + x86_cpu_adjust_feat_level(cpu, FEAT_7_2_EDX); + x86_cpu_adjust_feat_level(cpu, FEAT_8000_0001_EDX); + x86_cpu_adjust_feat_level(cpu, FEAT_8000_0001_ECX); + x86_cpu_adjust_feat_level(cpu, FEAT_8000_0007_EDX); + x86_cpu_adjust_feat_level(cpu, FEAT_8000_0008_EBX); + x86_cpu_adjust_feat_level(cpu, FEAT_C000_0001_EDX); + x86_cpu_adjust_feat_level(cpu, FEAT_SVM); + x86_cpu_adjust_feat_level(cpu, FEAT_XSAVE); - /* Intel Processor Trace requires CPUID[0x14] */ - if ((env->features[FEAT_7_0_EBX] & CPUID_7_0_EBX_INTEL_PT)) { - if (cpu->intel_pt_auto_level) { - x86_cpu_adjust_level(cpu, &cpu->env.cpuid_min_level, 0x14); - } else if (cpu->env.cpuid_min_level < 0x14) { - mark_unavailable_features(cpu, FEAT_7_0_EBX, - CPUID_7_0_EBX_INTEL_PT, - "Intel PT need CPUID leaf 0x14, please set by \"-cpu ...,intel-pt=on,min-level=0x14\""); - } + /* Intel Processor Trace requires CPUID[0x14] */ + if ((env->features[FEAT_7_0_EBX] & CPUID_7_0_EBX_INTEL_PT)) { + if (cpu->intel_pt_auto_level) { + x86_cpu_adjust_level(cpu, &cpu->env.cpuid_min_level, 0x14); + } else if (cpu->env.cpuid_min_level < 0x14) { + mark_unavailable_features(cpu, FEAT_7_0_EBX, CPUID_7_0_EBX_INTEL_PT, + "Intel PT need CPUID leaf 0x14, please set by \"-cpu ...,intel-pt=on,min-level=0x14\""); } + } - /* - * Intel CPU topology with multi-dies support requires CPUID[0x1F]. - * For AMD Rome/Milan, cpuid level is 0x10, and guest OS should detect - * extended toplogy by leaf 0xB. Only adjust it for Intel CPU, unless - * cpu->vendor_cpuid_only has been unset for compatibility with older - * machine types. - */ - if (x86_has_extended_topo(env->avail_cpu_topo) && - (IS_INTEL_CPU(env) || !cpu->vendor_cpuid_only)) { - x86_cpu_adjust_level(cpu, &env->cpuid_min_level, 0x1F); - } + /* + * Intel CPU topology with multi-dies support requires CPUID[0x1F]. + * For AMD Rome/Milan, cpuid level is 0x10, and guest OS should detect + * extended toplogy by leaf 0xB. Only adjust it for Intel CPU, unless + * cpu->vendor_cpuid_only has been unset for compatibility with older + * machine types. + */ + if (x86_has_extended_topo(env->avail_cpu_topo) && + (IS_INTEL_CPU(env) || !cpu->vendor_cpuid_only)) { + x86_cpu_adjust_level(cpu, &env->cpuid_min_level, 0x1F); + } - /* Advanced Vector Extensions 10 (AVX10) requires CPUID[0x24] */ - if (env->features[FEAT_7_1_EDX] & CPUID_7_1_EDX_AVX10) { - x86_cpu_adjust_level(cpu, &env->cpuid_min_level, 0x24); - } + /* Advanced Vector Extensions 10 (AVX10) requires CPUID[0x24] */ + if (env->features[FEAT_7_1_EDX] & CPUID_7_1_EDX_AVX10) { + x86_cpu_adjust_level(cpu, &env->cpuid_min_level, 0x24); + } - /* SVM requires CPUID[0x8000000A] */ - if (env->features[FEAT_8000_0001_ECX] & CPUID_EXT3_SVM) { - x86_cpu_adjust_level(cpu, &env->cpuid_min_xlevel, 0x8000000A); - } + /* SVM requires CPUID[0x8000000A] */ + if (env->features[FEAT_8000_0001_ECX] & CPUID_EXT3_SVM) { + x86_cpu_adjust_level(cpu, &env->cpuid_min_xlevel, 0x8000000A); + } - /* SEV requires CPUID[0x8000001F] */ - if (sev_enabled()) { - x86_cpu_adjust_level(cpu, &env->cpuid_min_xlevel, 0x8000001F); - } + /* SEV requires CPUID[0x8000001F] */ + if (sev_enabled()) { + x86_cpu_adjust_level(cpu, &env->cpuid_min_xlevel, 0x8000001F); + } - if (env->features[FEAT_8000_0021_EAX]) { - x86_cpu_adjust_level(cpu, &env->cpuid_min_xlevel, 0x80000021); - } + if (env->features[FEAT_8000_0021_EAX]) { + x86_cpu_adjust_level(cpu, &env->cpuid_min_xlevel, 0x80000021); + } - /* SGX requires CPUID[0x12] for EPC enumeration */ - if (env->features[FEAT_7_0_EBX] & CPUID_7_0_EBX_SGX) { - x86_cpu_adjust_level(cpu, &env->cpuid_min_level, 0x12); - } + /* SGX requires CPUID[0x12] for EPC enumeration */ + if (env->features[FEAT_7_0_EBX] & CPUID_7_0_EBX_SGX) { + x86_cpu_adjust_level(cpu, &env->cpuid_min_level, 0x12); } /* Set cpuid_*level* based on cpuid_min_*level, if not explicitly set */ @@ -8820,7 +8817,6 @@ static const Property x86_cpu_properties[] = { DEFINE_PROP_UINT32("min-xlevel2", X86CPU, env.cpuid_min_xlevel2, 0), DEFINE_PROP_UINT8("avx10-version", X86CPU, env.avx10_version, 0), DEFINE_PROP_UINT64("ucode-rev", X86CPU, ucode_rev, 0), - DEFINE_PROP_BOOL("full-cpuid-auto-level", X86CPU, full_cpuid_auto_level, true), DEFINE_PROP_STRING("hv-vendor-id", X86CPU, hyperv_vendor), DEFINE_PROP_BOOL("x-vendor-cpuid-only", X86CPU, vendor_cpuid_only, true), DEFINE_PROP_BOOL("x-amd-topoext-features-only", X86CPU, amd_topoext_features_only, true),
The CPUX86State::full_cpuid_auto_level boolean was only disabled for the pc-q35-2.7 and pc-i440fx-2.7 machines, which got removed. Being now always %true, we can remove it and simplify x86_cpu_expand_features(). Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> --- target/i386/cpu.h | 3 -- target/i386/cpu.c | 106 ++++++++++++++++++++++------------------------ 2 files changed, 51 insertions(+), 58 deletions(-)