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[v3] spi: dt-bindings: cdns,qspi-nor: Update minItems/maxItems of resets for Cadence OSPI controller

Message ID 20250527063438.504207-1-amit.kumar-mahapatra@amd.com
State New
Headers show
Series [v3] spi: dt-bindings: cdns,qspi-nor: Update minItems/maxItems of resets for Cadence OSPI controller | expand

Commit Message

Mahapatra, Amit Kumar May 27, 2025, 6:34 a.m. UTC 
The Cadence Octal SPI (OSPI) controller on AMD Versal SoCs requires only
one reset entry. To reflect this, the maxItems for "resets" and
"reset-names" has been set to 1 for AMD Versal SoCs.

Acked-by: Mark Brown <broonie@kernel.org>
Signed-off-by: Amit Kumar Mahapatra <amit.kumar-mahapatra@amd.com>
---
BRANCH: mtd/next

Changes in v3:
 - Updates to 'resets' and 'reset-names' removed for non-Versal platforms.
 - Updated patch description.
 - Added Mark's Acked-by tag.

Changes in v2:
 - Removed "resets" & "reset-names" from required properties.
 - To address review comments, removed "maxItems" from "reset-names".
 ---
 Documentation/devicetree/bindings/spi/cdns,qspi-nor.yaml | 7 +++++++
 1 file changed, 7 insertions(+)
diff mbox series

Patch

diff --git a/Documentation/devicetree/bindings/spi/cdns,qspi-nor.yaml b/Documentation/devicetree/bindings/spi/cdns,qspi-nor.yaml
index d48ecd6cd5ad..81e8342db4bc 100644
--- a/Documentation/devicetree/bindings/spi/cdns,qspi-nor.yaml
+++ b/Documentation/devicetree/bindings/spi/cdns,qspi-nor.yaml
@@ -17,6 +17,13 @@  allOf:
           contains:
             const: xlnx,versal-ospi-1.0
     then:
+      properties:
+        resets:
+          maxItems: 1
+
+        reset-names:
+          items:
+            enum: [ qspi ]
       required:
         - power-domains
   - if: