| Message ID | 20250605141801.1083266-1-peter.maydell@linaro.org |
|---|---|
| State | New |
| Headers | show |
| Series | hw/arm/mps2: Configure the AN500 CPU with 16 MPU regions | expand |
On Thu, 5 Jun 2025 at 15:18, Peter Maydell <peter.maydell@linaro.org> wrote: > > The AN500 application note documents that it configures the Cortex-M7 > CPU to have 16 MPU regions. We weren't doing this in our emulation, > so the CPU had only the default 8 MPU regions. Set the mpu-ns-regions > property to 16 for this board. > > This bug doesn't affect any of the other board types we model in > this source file, because they all use either the Cortex-M3 or > Cortex-M4. Those CPUs do not have an RTL configurable number of > MPU regions, and always provide 8 regions if the MPU is built in. > > Cc: qemu-stable@nongnu.org > Reported-by: Corentin GENDRE <cocotroupe20@gmail.com> > Signed-off-by: Peter Maydell <peter.maydell@linaro.org> > --- > hw/arm/mps2.c | 4 ++++ > 1 file changed, 4 insertions(+) > > diff --git a/hw/arm/mps2.c b/hw/arm/mps2.c > index 58efb41e6db..50e1a1c1c80 100644 > --- a/hw/arm/mps2.c > +++ b/hw/arm/mps2.c > @@ -224,7 +224,11 @@ static void mps2_common_init(MachineState *machine) > switch (mmc->fpga_type) { > case FPGA_AN385: > case FPGA_AN386: > + qdev_prop_set_uint32(armv7m, "num-irq", 32); > + break; > case FPGA_AN500: > + /* The AN500 configures its Cortex-M7 with 16 MPU regions */ > + qdev_prop_set_uint32(armv7m, "mpu-ns-dregions", 16); Rats, I failed to actually refresh the git commit with a fix for a bug that "make check" caught before I sent it out. This should be "mpu-ns-regions", without the "d". > qdev_prop_set_uint32(armv7m, "num-irq", 32); > break; > case FPGA_AN511: -- PMM
Fixed! Le jeu. 5 juin 2025 à 16:22, Peter Maydell <peter.maydell@linaro.org> a écrit : > On Thu, 5 Jun 2025 at 15:18, Peter Maydell <peter.maydell@linaro.org> > wrote: > > > > The AN500 application note documents that it configures the Cortex-M7 > > CPU to have 16 MPU regions. We weren't doing this in our emulation, > > so the CPU had only the default 8 MPU regions. Set the mpu-ns-regions > > property to 16 for this board. > > > > This bug doesn't affect any of the other board types we model in > > this source file, because they all use either the Cortex-M3 or > > Cortex-M4. Those CPUs do not have an RTL configurable number of > > MPU regions, and always provide 8 regions if the MPU is built in. > > > > Cc: qemu-stable@nongnu.org > > Reported-by: Corentin GENDRE <cocotroupe20@gmail.com> > > Signed-off-by: Peter Maydell <peter.maydell@linaro.org> > > --- > > hw/arm/mps2.c | 4 ++++ > > 1 file changed, 4 insertions(+) > > > > diff --git a/hw/arm/mps2.c b/hw/arm/mps2.c > > index 58efb41e6db..50e1a1c1c80 100644 > > --- a/hw/arm/mps2.c > > +++ b/hw/arm/mps2.c > > @@ -224,7 +224,11 @@ static void mps2_common_init(MachineState *machine) > > switch (mmc->fpga_type) { > > case FPGA_AN385: > > case FPGA_AN386: > > + qdev_prop_set_uint32(armv7m, "num-irq", 32); > > + break; > > case FPGA_AN500: > > + /* The AN500 configures its Cortex-M7 with 16 MPU regions */ > > + qdev_prop_set_uint32(armv7m, "mpu-ns-dregions", 16); > > Rats, I failed to actually refresh the git commit with a > fix for a bug that "make check" caught before I sent it out. > This should be "mpu-ns-regions", without the "d". > > > qdev_prop_set_uint32(armv7m, "num-irq", 32); > > break; > > case FPGA_AN511: > > -- PMM >
diff --git a/hw/arm/mps2.c b/hw/arm/mps2.c index 58efb41e6db..50e1a1c1c80 100644 --- a/hw/arm/mps2.c +++ b/hw/arm/mps2.c @@ -224,7 +224,11 @@ static void mps2_common_init(MachineState *machine) switch (mmc->fpga_type) { case FPGA_AN385: case FPGA_AN386: + qdev_prop_set_uint32(armv7m, "num-irq", 32); + break; case FPGA_AN500: + /* The AN500 configures its Cortex-M7 with 16 MPU regions */ + qdev_prop_set_uint32(armv7m, "mpu-ns-dregions", 16); qdev_prop_set_uint32(armv7m, "num-irq", 32); break; case FPGA_AN511:
The AN500 application note documents that it configures the Cortex-M7 CPU to have 16 MPU regions. We weren't doing this in our emulation, so the CPU had only the default 8 MPU regions. Set the mpu-ns-regions property to 16 for this board. This bug doesn't affect any of the other board types we model in this source file, because they all use either the Cortex-M3 or Cortex-M4. Those CPUs do not have an RTL configurable number of MPU regions, and always provide 8 regions if the MPU is built in. Cc: qemu-stable@nongnu.org Reported-by: Corentin GENDRE <cocotroupe20@gmail.com> Signed-off-by: Peter Maydell <peter.maydell@linaro.org> --- hw/arm/mps2.c | 4 ++++ 1 file changed, 4 insertions(+)