diff mbox series

ARM: dts: qcom: msm8960: use macros for interrupts

Message ID 20250606-msm8960-irq-macros-v1-1-03e573ba26d6@proton.me
State New
Headers show
Series ARM: dts: qcom: msm8960: use macros for interrupts | expand

Commit Message

Max Shevchenko via B4 Relay June 6, 2025, 11:03 a.m. UTC 
From: Max Shevchenko <wctrl@proton.me>

Replace the raw values with macros. No changes to the output

Tested-by: Rudraksha Gupta <guptarud@gmail.com>
Signed-off-by: Max Shevchenko <wctrl@proton.me>
---
Replace the raw values with macros. No changes to the output
---
 arch/arm/boot/dts/qcom/qcom-msm8960.dtsi | 10 +++++-----
 1 file changed, 5 insertions(+), 5 deletions(-)


---
base-commit: 0ff41df1cb268fc69e703a08a57ee14ae967d0ca
change-id: 20250603-msm8960-irq-macros-6dafa735cecc

Best regards,
diff mbox series

Patch

diff --git a/arch/arm/boot/dts/qcom/qcom-msm8960.dtsi b/arch/arm/boot/dts/qcom/qcom-msm8960.dtsi
index 865fe7cc39511d7cb9ec5c4b12100404f77e2989..13572d0b1d5572cc5b9c3a136a6ea6267b8625da 100644
--- a/arch/arm/boot/dts/qcom/qcom-msm8960.dtsi
+++ b/arch/arm/boot/dts/qcom/qcom-msm8960.dtsi
@@ -18,7 +18,7 @@  / {
 	cpus {
 		#address-cells = <1>;
 		#size-cells = <0>;
-		interrupts = <GIC_PPI 14 0x304>;
+		interrupts = <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
 
 		cpu@0 {
 			compatible = "qcom,krait";
@@ -54,7 +54,7 @@  memory@80000000 {
 
 	cpu-pmu {
 		compatible = "qcom,krait-pmu";
-		interrupts = <GIC_PPI 10 0x304>;
+		interrupts = <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
 		qcom,no-pc-write;
 	};
 
@@ -107,9 +107,9 @@  intc: interrupt-controller@2000000 {
 		timer@200a000 {
 			compatible = "qcom,kpss-wdt-msm8960", "qcom,kpss-timer",
 				     "qcom,msm-timer";
-			interrupts = <GIC_PPI 1 0x301>,
-				     <GIC_PPI 2 0x301>,
-				     <GIC_PPI 3 0x301>;
+			interrupts = <GIC_PPI 1 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_EDGE_RISING)>,
+				     <GIC_PPI 2 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_EDGE_RISING)>,
+				     <GIC_PPI 3 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_EDGE_RISING)>;
 			reg = <0x0200a000 0x100>;
 			clock-frequency = <27000000>;
 			cpu-offset = <0x80000>;