@@ -978,6 +978,14 @@ static void i801_disable_host_notify(struct i801_priv *priv)
iowrite8(priv->original_slvcmd, SMBSLVCMD(priv));
}
+static inline __maybe_unused void __i801_register_spd(struct i801_priv *priv)
+{
+ if (priv->original_hstcfg & SMBHSTCFG_SPD_WD)
+ i2c_register_spd_write_disable(&priv->adapter);
+ else
+ i2c_register_spd_write_enable(&priv->adapter);
+}
+
static const struct i2c_algorithm smbus_algorithm = {
.smbus_xfer = i801_access,
.functionality = i801_func,
@@ -1157,6 +1165,19 @@ static void dmi_check_onboard_devices(const struct dmi_header *dm, void *adap)
}
}
+#ifdef CONFIG_I2C_I801_MUX
+static void i801_register_spd(struct i801_priv *priv)
+{
+ if (!priv->mux_pdev)
+ __i801_register_spd(priv);
+}
+#else
+static void i801_register_spd(struct i801_priv *priv)
+{
+ __i801_register_spd(priv);
+}
+#endif
+
/* Register optional targets */
static void i801_probe_optional_targets(struct i801_priv *priv)
{
@@ -1177,10 +1198,7 @@ static void i801_probe_optional_targets(struct i801_priv *priv)
dmi_walk(dmi_check_onboard_devices, &priv->adapter);
/* Instantiate SPD EEPROMs unless the SMBus is multiplexed */
-#ifdef CONFIG_I2C_I801_MUX
- if (!priv->mux_pdev)
-#endif
- i2c_register_spd_write_enable(&priv->adapter);
+ i801_register_spd(priv);
}
#else
static void __init input_apanel_init(void) {}
@@ -1283,7 +1301,7 @@ static int i801_notifier_call(struct notifier_block *nb, unsigned long action,
return NOTIFY_DONE;
/* Call i2c_register_spd for muxed child segments */
- i2c_register_spd_write_enable(to_i2c_adapter(dev));
+ __i801_register_spd(priv);
return NOTIFY_OK;
}
If SPD Write Disable bit in the SMBus is enabled, writing data to addresses from 0x50 to 0x57 is forbidden. This may lead to the following issues for spd5118 devices: 1) Writes to the sensor hwmon sysfs attributes will always result in ENXIO. 2) During system-wide resume, errors may occur during regcache sync, resulting in the following error messages: kernel: spd5118 1-0050: failed to write b = 0: -6 kernel: spd5118 1-0050: pm: dpm_run_callback(): spd5118_resume [spd5118] returns -6 kernel: spd5118 1-0050: pm: failed to resume async: error -6 3) nvmem won't be usable, because writing to the page selector becomes impossible. Also, BIOS vendors may choose to set the page to a value != 0 after a board reset. This will make the sensor not functional unless its MR11 register can be changed, which is impossible due to writes being disabled. To address these issues, don't instantiate it at all if the SPD Write Disable bit is set. Signed-off-by: Yo-Jung Lin (Leo) <leo.lin@canonical.com> --- Changes in v2: - Fix build failure on some non-x86 archs, by moving __i801_register_spd() out of the CONFIG_X86 && defined CONFIG_DMI region - Also fix unused function warning by adding __always_inline. - Link to v1: https://lore.kernel.org/r/20250528-for-upstream-not-instantiate-spd5118-v1-1-8216e2d38918@canonical.com --- drivers/i2c/busses/i2c-i801.c | 28 +++++++++++++++++++++++----- 1 file changed, 23 insertions(+), 5 deletions(-) --- base-commit: 0bb71d301869446810a0b13d3da290bd455d7c78 change-id: 20250526-for-upstream-not-instantiate-spd5118-463225b346a0 Best regards,