diff mbox series

[PULL,9/9] linux-user/arm: Fix return value of SYS_cacheflush

Message ID 20250616140630.2273870-10-peter.maydell@linaro.org
State New
Headers show
Series [PULL,1/9] hw/arm/virt: Check bypass iommu is not set for iommu-map DT property | expand

Commit Message

Peter Maydell June 16, 2025, 2:06 p.m. UTC 
From: J. Neuschäfer <j.neuschaefer@gmx.net>

Although the emulated cacheflush syscall does nothing, it still needs to
return zero to indicate success.

Cc: qemu-stable@nongnu.org
Signed-off-by: J. Neuschäfer <j.neuschaefer@gmx.net>
Message-id: 20250613-cache-v1-1-ee9f4a9ba81b@gmx.net
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
 linux-user/arm/cpu_loop.c | 1 +
 1 file changed, 1 insertion(+)
diff mbox series

Patch

diff --git a/linux-user/arm/cpu_loop.c b/linux-user/arm/cpu_loop.c
index e8417d04069..33f63951a95 100644
--- a/linux-user/arm/cpu_loop.c
+++ b/linux-user/arm/cpu_loop.c
@@ -363,6 +363,7 @@  void cpu_loop(CPUARMState *env)
                     switch (n) {
                     case ARM_NR_cacheflush:
                         /* nop */
+                        env->regs[0] = 0;
                         break;
                     case ARM_NR_set_tls:
                         cpu_set_tls(env, env->regs[0]);