@@ -28,7 +28,7 @@ include $(TOPDIR)/config.mk
LIB = $(obj)lib$(SOC).o
COBJS = soc.o clock.o iomux.o timer.o speed.o
-SOBJS = lowlevel_init.o
+SOBJS = lowlevel_init.o cache.o
SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS))
new file mode 100644
@@ -0,0 +1,43 @@
+/*
+ * Copyright 2011 Linaro Ltd.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+.align 5
+.global invalidate_dcache
+.global l2_cache_enable
+.global l2_cache_disable
+
+/*
+ * Sine we did not enable D-cache in uboot,this is the
+ * Dummy function for L2 ON to make build pass. please
+ * Check the arch/arm/cpu/armv7/cpu.c file
+ */
+invalidate_dcache:
+ mov pc, lr
+
+l2_cache_enable:
+ mrc p15, 0, r0, c1, c0, 1;
+ orr r0, r0, #0x2
+ mcr p15, 0, r0, c1, c0, 1;
+ mov pc, lr
+
+l2_cache_disable:
+ mrc p15, 0, r0, c1, c0, 1;
+ bic r0, r0, #0x2
+ mcr p15, 0, r0, c1, c0, 1;
+ mov pc, lr
@@ -144,3 +144,9 @@ void reset_cpu(ulong addr)
{
__raw_writew(4, WDOG1_BASE_ADDR);
}
+
+/*dummy function for L2 ON*/
+u32 get_device_type(void)
+{
+ return 0;
+}
@@ -27,5 +27,7 @@
u32 get_cpu_rev(void);
#define is_soc_rev(rev) ((get_cpu_rev() & 0xFF) - rev)
void sdelay(unsigned long);
+void invalidate_dcache(u32);
+u32 get_device_type(void);
#endif
@@ -35,8 +35,6 @@
#define CONFIG_SYS_TEXT_BASE 0x97800000
-#define CONFIG_L2_OFF
-
#include <asm/arch/imx-regs.h>
/*
* Disabled for now due to build problems under Debian and a significant
@@ -29,8 +29,6 @@
#define CONFIG_DISPLAY_CPUINFO
#define CONFIG_DISPLAY_BOARDINFO
-#define CONFIG_L2_OFF
-
#include <asm/arch/imx-regs.h>
#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
@@ -30,8 +30,6 @@
#define CONFIG_DISPLAY_CPUINFO
#define CONFIG_DISPLAY_BOARDINFO
-#define CONFIG_L2_OFF
-
#include <asm/arch/imx-regs.h>
#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
Currently, Linux kernel does not do any L2 cache enable Operation.So,Keep L2 cache enabled(L2EN=1) in the u-boot before Jump to the Linux Kernel and thus L2 cache can be effectively used in Linux Kernel. Signed-off-by: Jason Liu <jason.hui@linaro.org> --- arch/arm/cpu/armv7/mx5/Makefile | 2 +- arch/arm/cpu/armv7/mx5/cache.S | 43 +++++++++++++++++++++++++++++ arch/arm/cpu/armv7/mx5/soc.c | 6 ++++ arch/arm/include/asm/arch-mx5/sys_proto.h | 2 + include/configs/mx51evk.h | 2 - include/configs/mx53evk.h | 2 - include/configs/mx53loco.h | 2 - 7 files changed, 52 insertions(+), 7 deletions(-)