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Show patches with: Series = target/arm: Convert a64 advsimd to decodetree (part 1)       |   67 patches
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Patch Series S/W/F Date Submitter Delegate State
[v2,67/67] target/arm: Convert FCSEL to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-24 Richard Henderson Superseded
[v2,66/67] target/arm: Convert FMADD, FMSUB, FNMADD, FNMSUB to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-24 Richard Henderson Superseded
[v2,65/67] target/arm: Convert SQDMULH, SQRDMULH to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-24 Richard Henderson Superseded
[v2,64/67] target/arm: Tidy SQDMULH, SQRDMULH (vector) target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-24 Richard Henderson Superseded
[v2,63/67] target/arm: Convert MLA, MLS to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-24 Richard Henderson Superseded
[v2,62/67] target/arm: Convert MUL, PMUL to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-24 Richard Henderson Superseded
[v2,61/67] target/arm: Convert SABA, SABD, UABA, UABD to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-24 Richard Henderson Superseded
[v2,60/67] target/arm: Convert SMAX, SMIN, UMAX, UMIN to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-24 Richard Henderson Superseded
[v2,59/67] target/arm: Convert SRHADD, URHADD to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-24 Richard Henderson Superseded
[v2,58/67] target/arm: Convert SRHADD, URHADD to gvec target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-24 Richard Henderson Superseded
[v2,57/67] target/arm: Convert SHSUB, UHSUB to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-24 Richard Henderson Superseded
[v2,56/67] target/arm: Convert SHSUB, UHSUB to gvec target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-24 Richard Henderson Superseded
[v2,55/67] target/arm: Convert SHADD, UHADD to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-24 Richard Henderson Superseded
[v2,54/67] target/arm: Convert SHADD, UHADD to gvec target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-24 Richard Henderson Superseded
[v2,53/67] target/arm: Use TCG_COND_TSTNE in gen_cmtst_vec target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-24 Richard Henderson Superseded
[v2,52/67] target/arm: Use TCG_COND_TSTNE in gen_cmtst_{i32, i64} target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-24 Richard Henderson Superseded
[v2,51/67] target/arm: Convert CMGT, CMHI, CMGE, CMHS, CMTST, CMEQ to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-24 Richard Henderson Superseded
[v2,50/67] target/arm: Convert ADD, SUB (vector) to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-24 Richard Henderson Superseded
[v2,49/67] target/arm: Convert SQRSHL, UQRSHL to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-24 Richard Henderson Superseded
[v2,48/67] target/arm: Convert SQRSHL and UQRSHL (register) to gvec target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-24 Richard Henderson Superseded
[v2,47/67] target/arm: Convert SQSHL, UQSHL to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-24 Richard Henderson Superseded
[v2,46/67] target/arm: Convert SQSHL and UQSHL (register) to gvec target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-24 Richard Henderson Superseded
[v2,45/67] target/arm: Convert SRSHL, URSHL to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-24 Richard Henderson New
[v2,44/67] target/arm: Convert SRSHL and URSHL (register) to gvec target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-24 Richard Henderson Superseded
[v2,43/67] target/arm: Convert SSHL, USHL to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-24 Richard Henderson New
[v2,42/67] target/arm: Convert SUQADD, USQADD to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-24 Richard Henderson Superseded
[v2,41/67] target/arm: Convert SQADD, SQSUB, UQADD, UQSUB to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-24 Richard Henderson Superseded
[v2,40/67] target/arm: Inline scalar SQADD, UQADD, SQSUB, UQSUB target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-24 Richard Henderson Superseded
[v2,39/67] target/arm: Inline scalar SUQADD and USQADD target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-24 Richard Henderson Superseded
[v2,38/67] target/arm: Convert SUQADD and USQADD to gvec target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-24 Richard Henderson New
[v2,37/67] target/arm: Improve vector UQADD, UQSUB, SQADD, SQSUB target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-24 Richard Henderson Superseded
[v2,36/67] target/arm: Convert disas_simd_3same_logic to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-24 Richard Henderson Superseded
[v2,35/67] target/arm: Convert FMLAL, FMLSL to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-24 Richard Henderson Superseded
[v2,34/67] target/arm: Use gvec for neon pmax, pmin target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-24 Richard Henderson Superseded
[v2,33/67] target/arm: Convert SMAXP, SMINP, UMAXP, UMINP to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-24 Richard Henderson New
[v2,32/67] target/arm: Use gvec for neon padd target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-24 Richard Henderson Superseded
[v2,31/67] target/arm: Convert ADDP to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-24 Richard Henderson Superseded
[v2,30/67] target/arm: Use gvec for neon faddp, fmaxp, fminp target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-24 Richard Henderson Superseded
[v2,29/67] target/arm: Convert FMAXP, FMINP, FMAXNMP, FMINNMP to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-24 Richard Henderson New
[v2,28/67] target/arm: Convert FADDP to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-24 Richard Henderson Superseded
[v2,27/67] target/arm: Convert FRECPS, FRSQRTS to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-24 Richard Henderson Superseded
[v2,26/67] target/arm: Convert FABD to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-24 Richard Henderson Superseded
[v2,25/67] target/arm: Convert FCMEQ, FCMGE, FCMGT, FACGE, FACGT to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-24 Richard Henderson Superseded
[v2,24/67] target/arm: Convert FMLA, FMLS to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-24 Richard Henderson Superseded
[v2,23/67] target/arm: Convert FNMUL to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-24 Richard Henderson Superseded
[v2,22/67] target/arm: Expand vfp neg and abs inline target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-24 Richard Henderson New
[v2,21/67] target/arm: Introduce vfp_load_reg16 target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-24 Richard Henderson Superseded
[v2,20/67] target/arm: Convert FMAX, FMIN, FMAXNM, FMINNM to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-24 Richard Henderson Superseded
[v2,19/67] target/arm: Convert FADD, FSUB, FDIV, FMUL to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-24 Richard Henderson New
[v2,18/67] target/arm: Convert FMULX to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-24 Richard Henderson New
[v2,17/67] target/arm: Convert Advanced SIMD copy to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-24 Richard Henderson Superseded
[v2,16/67] target/arm: Convert XAR to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-24 Richard Henderson Superseded
[v2,15/67] target/arm: Convert Cryptographic 3-register, imm2 to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-24 Richard Henderson Superseded
[v2,14/67] target/arm: Convert Cryptographic 4-register to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-24 Richard Henderson Superseded
[v2,13/67] target/arm: Convert Cryptographic 2-register SHA512 to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-24 Richard Henderson Superseded
[v2,12/67] target/arm: Convert Cryptographic 3-register SHA512 to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-24 Richard Henderson Superseded
[v2,11/67] target/arm: Convert Cryptographic 2-register SHA to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-24 Richard Henderson Superseded
[v2,10/67] target/arm: Convert Cryptographic 3-register SHA to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-24 Richard Henderson Superseded
[v2,09/67] target/arm: Convert Cryptographic AES to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-24 Richard Henderson Superseded
[v2,08/67] target/arm: Split out gengvec64.c target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-24 Richard Henderson New
[v2,07/67] target/arm: Split out gengvec.c target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-24 Richard Henderson New
[v2,06/67] target/arm: Verify sz=0 for Advanced SIMD scalar pairwise (fp16) target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-24 Richard Henderson Superseded
[v2,05/67] target/arm: Fix decode of FMOV (hp) vs MOVI target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-24 Richard Henderson Superseded
[v2,04/67] target/arm: Zero-extend writeback for fp16 FCVTZS (scalar, integer) target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-24 Richard Henderson Superseded
[v2,03/67] target/arm: Reject incorrect operands to PLD, PLDW, PLI target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-24 Richard Henderson New
[v2,02/67] target/arm: Use PLD, PLDW, PLI not NOP for t32 target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-24 Richard Henderson Superseded
[v2,01/67] target/arm: Add neoverse-n1 to qemu-arm (DO NOT MERGE) target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-24 Richard Henderson New

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