From patchwork Sat Apr 1 11:29:22 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chenhui Sun X-Patchwork-Id: 96575 Delivered-To: patch@linaro.org Received: by 10.140.89.233 with SMTP id v96csp1125555qgd; Sat, 1 Apr 2017 04:40:04 -0700 (PDT) X-Received: by 10.55.2.7 with SMTP id 7mr7913910qkc.228.1491046803955; Sat, 01 Apr 2017 04:40:03 -0700 (PDT) Return-Path: Received: from lists.linaro.org (lists.linaro.org. [54.225.227.206]) by mx.google.com with ESMTP id d4si7168391qkf.11.2017.04.01.04.40.03; Sat, 01 Apr 2017 04:40:03 -0700 (PDT) Received-SPF: pass (google.com: domain of linaro-uefi-bounces@lists.linaro.org designates 54.225.227.206 as permitted sender) client-ip=54.225.227.206; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linaro-uefi-bounces@lists.linaro.org designates 54.225.227.206 as permitted sender) smtp.mailfrom=linaro-uefi-bounces@lists.linaro.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: by lists.linaro.org (Postfix, from userid 109) id 82B8263664; Sat, 1 Apr 2017 11:40:03 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on ip-10-142-244-252 X-Spam-Level: X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_NONE, RCVD_IN_MSPIKE_H3, RCVD_IN_MSPIKE_WL, URIBL_BLOCKED autolearn=disabled version=3.4.0 Received: from [127.0.0.1] (localhost [127.0.0.1]) by lists.linaro.org (Postfix) with ESMTP id 771DE63669; Sat, 1 Apr 2017 11:37:56 +0000 (UTC) X-Original-To: linaro-uefi@lists.linaro.org Delivered-To: linaro-uefi@lists.linaro.org Received: by lists.linaro.org (Postfix, from userid 109) id 7C25E60EA6; Sat, 1 Apr 2017 11:37:45 +0000 (UTC) Received: from mail-pg0-f41.google.com (mail-pg0-f41.google.com [74.125.83.41]) by lists.linaro.org (Postfix) with ESMTPS id 77B26608C2 for ; Sat, 1 Apr 2017 11:36:19 +0000 (UTC) Received: by mail-pg0-f41.google.com with SMTP id g2so88512935pge.3 for ; Sat, 01 Apr 2017 04:36:19 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=+W7NEotd3nGi9ZAX32jhILqnjWmIbEJtwq2yTpTsUdY=; b=JpwO6tqHYieXfC6iS4V6PdtJ7e6VcwMwuIBjc93kR+1x5M2zFsndEffS7dNjfZRekK aWlTDwp2MW+l0huFeJkaBFHfz92040YvRAe7mbkz3j/KRfbOWjPpPPlJo1Pfl79cRZJA zFZQwu//80uyUMYeaHzv3Xi6myrBfkSL6kBpbTjMKVH4y3tpV5oZhmVYih0z4olj3OdR eSxRf5URywF12kF+p6jm594xdx5qLxFi29naWg/lF31CZrPHF0AnqUb3jW6DCKF5U4QU t6emuYcL9tgs+cOZRjo4t3i3wuVGzkFtjGUVf6g4TZxJ2NnQ81SI3SEYaMgudrrcB8DA yXNA== X-Gm-Message-State: AFeK/H0UqJQMvj1yavQxmDM76AlfsCP6GF+wGkQHycYBRh1+1/TP73aif4oVdZBximwjVDg+47s= X-Received: by 10.84.248.72 with SMTP id e8mr8769668pln.133.1491046578800; Sat, 01 Apr 2017 04:36:18 -0700 (PDT) Received: from localhost.localdomain ([119.145.15.121]) by smtp.gmail.com with ESMTPSA id a62sm15704868pgc.60.2017.04.01.04.36.15 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Sat, 01 Apr 2017 04:36:18 -0700 (PDT) From: Chenhui Sun To: leif.lindholm@linaro.org, linaro-uefi@lists.linaro.org, graeme.gregory@linaro.org Date: Sat, 1 Apr 2017 19:29:22 +0800 Message-Id: <1491046162-53797-18-git-send-email-chenhui.sun@linaro.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1491046162-53797-1-git-send-email-chenhui.sun@linaro.org> References: <1491046162-53797-1-git-send-email-chenhui.sun@linaro.org> Cc: Yi Li , Chenhui Sun , Heyi Guo , sunchenhui@huawei.com, wanghuiqiang@huawei.com Subject: [Linaro-uefi] [Linaro-uefi v2 17/17] Hisilicon/D05: add num-pins package for Roce X-BeenThere: linaro-uefi@lists.linaro.org X-Mailman-Version: 2.1.16 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: linaro-uefi-bounces@lists.linaro.org Sender: "Linaro-uefi" Add num-pins package for Roce driver. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: hensonwang Signed-off-by: Heyi Guo Signed-off-by: Yi Li Reviewed-by: Graeme Gregory Reviewed-by: Leif Lindholm --- Chips/Hisilicon/Hi1616/D05AcpiTables/Dsdt/D05Mbig.asl | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/Chips/Hisilicon/Hi1616/D05AcpiTables/Dsdt/D05Mbig.asl b/Chips/Hisilicon/Hi1616/D05AcpiTables/Dsdt/D05Mbig.asl index 9ee9d83..cdf3e57 100644 --- a/Chips/Hisilicon/Hi1616/D05AcpiTables/Dsdt/D05Mbig.asl +++ b/Chips/Hisilicon/Hi1616/D05AcpiTables/Dsdt/D05Mbig.asl @@ -434,5 +434,12 @@ Scope(_SB) 746, 747, 748, 749, 750, 751, 752, 753, 785, 754, } }) + Name(_DSD, Package () { + ToUUID("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"), + Package () + { + Package () {"num-pins", 34} + } + }) } }