From patchwork Wed Jul 6 13:59:34 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ard Biesheuvel X-Patchwork-Id: 71471 Delivered-To: patch@linaro.org Received: by 10.140.28.4 with SMTP id 4csp879830qgy; Wed, 6 Jul 2016 06:59:41 -0700 (PDT) X-Received: by 10.55.100.12 with SMTP id y12mr14963659qkb.106.1467813581312; Wed, 06 Jul 2016 06:59:41 -0700 (PDT) Return-Path: Received: from lists.linaro.org (lists.linaro.org. [54.225.227.206]) by mx.google.com with ESMTP id l7si2414219qki.326.2016.07.06.06.59.39; Wed, 06 Jul 2016 06:59:41 -0700 (PDT) Received-SPF: pass (google.com: domain of linaro-uefi-bounces@lists.linaro.org designates 54.225.227.206 as permitted sender) client-ip=54.225.227.206; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linaro-uefi-bounces@lists.linaro.org designates 54.225.227.206 as permitted sender) smtp.mailfrom=linaro-uefi-bounces@lists.linaro.org; dmarc=pass (p=NONE dis=NONE) header.from=linaro.org Received: by lists.linaro.org (Postfix, from userid 109) id 972A168428; Wed, 6 Jul 2016 13:59:39 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on ip-10-142-244-252 X-Spam-Level: X-Spam-Status: No, score=-2.6 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_LOW, RCVD_IN_MSPIKE_H2, URIBL_BLOCKED autolearn=disabled version=3.4.0 Received: from [127.0.0.1] (localhost [127.0.0.1]) by lists.linaro.org (Postfix) with ESMTP id F1BC6683F8; Wed, 6 Jul 2016 13:59:37 +0000 (UTC) X-Original-To: linaro-uefi@lists.linaro.org Delivered-To: linaro-uefi@lists.linaro.org Received: by lists.linaro.org (Postfix, from userid 109) id D091C68422; Wed, 6 Jul 2016 13:59:36 +0000 (UTC) Received: from mail-io0-f182.google.com (mail-io0-f182.google.com [209.85.223.182]) by lists.linaro.org (Postfix) with ESMTPS id 0061C683F8 for ; Wed, 6 Jul 2016 13:59:36 +0000 (UTC) Received: by mail-io0-f182.google.com with SMTP id s63so200212985ioi.3 for ; Wed, 06 Jul 2016 06:59:35 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:mime-version:in-reply-to:references:from:date :message-id:subject:to:cc; bh=3tTkCejjZnzxQwkVXxpweXAFLhO+b53Z0LKMRfqSPmc=; b=Zs7TwxBn5PvE0uYrz2jx3HKPSIkEspa72R0ANrmkHk5GBwZoobfc08UWGxRvWYddxr f8D5popDUffaMQAzBVCWBIshuMBRJploRlK356sB5oey+kd2eCN085KFINo3r9ZkGt/z WNjHcMBOQRxHCqLWQdM2NR011vIrb7E+cTxZmeFFk4UZL2ElpAlqmCVIQcbxGHLGZBJB zt7dOV4hWPhivK+wI6lGZkfF6lZ5uSk5+VCuRDO9n32mBLM9+7VijuEOCvgZSYtJKAI2 lprcYOb/P5uwjj/MGQC0VG3CwZoeL6kEyi2q8V9P3wOZo0FUB5SQD2U2RTY7IPdNhUtE zAXA== X-Gm-Message-State: ALyK8tK5yiPrlWaLS/tgblJtwzG9HFx8diK2LIHBV7geIGWuzulgdnfXhr4HUvzDuqk3H5LSObubF5nXa9/MjJGOR6I= X-Received: by 10.107.40.205 with SMTP id o196mr17926744ioo.183.1467813575393; Wed, 06 Jul 2016 06:59:35 -0700 (PDT) MIME-Version: 1.0 Received: by 10.36.214.6 with HTTP; Wed, 6 Jul 2016 06:59:34 -0700 (PDT) In-Reply-To: <1467812922-24584-1-git-send-email-ard.biesheuvel@linaro.org> References: <1467812922-24584-1-git-send-email-ard.biesheuvel@linaro.org> From: Ard Biesheuvel Date: Wed, 6 Jul 2016 15:59:34 +0200 Message-ID: To: Linaro UEFI Mailman List , Leif Lindholm , Ryan Harkin , Heyi Guo , Ricardo Salveti Subject: Re: [Linaro-uefi] [PATCH] Platforms: add resolution for new library class 'ArmMmuLib' X-BeenThere: linaro-uefi@lists.linaro.org X-Mailman-Version: 2.1.16 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: linaro-uefi-bounces@lists.linaro.org Sender: "Linaro-uefi" On 6 July 2016 at 15:48, Ard Biesheuvel wrote: > Now that the page table manipulation code has been split off from ArmLib > into ArmMmuLib, we need a resolution for this new library class in all > platforms. For most platforms, this is simply a matter of adding a new > line > > ArmMmuLib|ArmPkg/Library/ArmMmuLib/ArmMmuBaseLib.inf > > to a common [LibraryClass] section. > > For D02/D03, which were users of the special PEI_CORE/PEIM implementation > of ArmLib, we drop the reference to this special version from the > [LibraryClasses.PEI_CORE] section (since PEI core does use ArmLib but does > not use the MMU code), and replace the one in [LibraryClasses.PEIM] with > the new ArmMmuPeiLib.inf implementation, which is the new version that > takes care not to issue cache maintenance ops on NOR flash. > > Contributed-under: TianoCore Contribution Agreement 1.0 > Signed-off-by: Ard Biesheuvel > --- > This change will be needed as soon as I commit the series 'ArmPkg: refactor > MMU handling routines into separate ArmMmuLib', which is good to go from > review perspective. If people are ok with this patch, I will merge it at > the same time as the series (unless there are other reasons to wait) > > Since this change is not bisectable anyway (since the EDK2 change and the > OPP change both need to occur at the same time), I saw little point in > splitting this into several patches. > Actually, similar to the ArmMmuLib 3/4 patch, this requires some minor additional tweaks for Cello/Overdrive and Beagle, which I didn't spot until right after hitting 'send' """ """ Reviewed-by: Leif Lindholm diff --git a/Platforms/AMD/Styx/Library/MemoryInitPei/MemoryInitPeiLib.c b/Platforms/AMD/Styx/Library/MemoryInitPei/MemoryInitPeiLib.c index 13388c175e4b..5fb63349864e 100644 --- a/Platforms/AMD/Styx/Library/MemoryInitPei/MemoryInitPeiLib.c +++ b/Platforms/AMD/Styx/Library/MemoryInitPei/MemoryInitPeiLib.c @@ -20,6 +20,7 @@ #include +#include #include #include #include diff --git a/Platforms/AMD/Styx/Library/MemoryInitPei/MemoryInitPeiLib.inf b/Platforms/AMD/Styx/Library/MemoryInitPei/MemoryInitPeiLib.inf index 42f755b74b41..1ae0b70ee3eb 100644 --- a/Platforms/AMD/Styx/Library/MemoryInitPei/MemoryInitPeiLib.inf +++ b/Platforms/AMD/Styx/Library/MemoryInitPei/MemoryInitPeiLib.inf @@ -40,7 +40,7 @@ [LibraryClasses] DebugLib HobLib - ArmLib + ArmMmuLib ArmPlatformLib PcdLib diff --git a/Platforms/TexasInstruments/BeagleBoard/Sec/Cache.c b/Platforms/TexasInstruments/BeagleBoard/Sec/Cache.c index 7399eef5be7c..155043e5dd01 100644 --- a/Platforms/TexasInstruments/BeagleBoard/Sec/Cache.c +++ b/Platforms/TexasInstruments/BeagleBoard/Sec/Cache.c @@ -15,6 +15,7 @@ #include #include +#include #include #include diff --git a/Platforms/TexasInstruments/BeagleBoard/Sec/Sec.inf b/Platforms/TexasInstruments/BeagleBoard/Sec/Sec.inf index 82fc2aafd157..5f207d0eef24 100644 --- a/Platforms/TexasInstruments/BeagleBoard/Sec/Sec.inf +++ b/Platforms/TexasInstruments/BeagleBoard/Sec/Sec.inf @@ -43,6 +43,7 @@ BaseLib DebugLib ArmLib + ArmMmuLib IoLib ExtractGuidedSectionLib LzmaDecompressLib