diff --git a/xen/arch/arm/arm64/lib/bitops.S b/xen/arch/arm/arm64/lib/bitops.S
index 80cc903..e1ad239 100644
--- a/xen/arch/arm/arm64/lib/bitops.S
+++ b/xen/arch/arm/arm64/lib/bitops.S
@@ -46,11 +46,12 @@ ENTRY(	\name	)
 	mov	x2, #1
 	add	x1, x1, x0, lsr #3	// Get word offset
 	lsl	x4, x2, x3		// Create mask
-1:	ldaxr	w2, [x1]
+1:	ldxr	w2, [x1]
 	lsr	w0, w2, w3		// Save old value of bit
 	\instr	w2, w2, w4		// toggle bit
 	stlxr	w5, w2, [x1]
 	cbnz	w5, 1b
+	dmb	ish
 	and	w0, w0, #1
 3:	ret
 ENDPROC(\name	)
diff --git a/xen/include/asm-arm/arm64/atomic.h b/xen/include/asm-arm/arm64/atomic.h
index 6b37945..3f37ed5 100644
--- a/xen/include/asm-arm/arm64/atomic.h
+++ b/xen/include/asm-arm/arm64/atomic.h
@@ -48,7 +48,7 @@ static inline int atomic_add_return(int i, atomic_t *v)
 	int result;
 
 	asm volatile("// atomic_add_return\n"
-"1:	ldaxr	%w0, %2\n"
+"1:	ldxr	%w0, %2\n"
 "	add	%w0, %w0, %w3\n"
 "	stlxr	%w1, %w0, %2\n"
 "	cbnz	%w1, 1b"
@@ -56,6 +56,7 @@ static inline int atomic_add_return(int i, atomic_t *v)
 	: "Ir" (i)
 	: "cc", "memory");
 
+	smp_mb();
 	return result;
 }
 
@@ -80,7 +81,7 @@ static inline int atomic_sub_return(int i, atomic_t *v)
 	int result;
 
 	asm volatile("// atomic_sub_return\n"
-"1:	ldaxr	%w0, %2\n"
+"1:	ldxr	%w0, %2\n"
 "	sub	%w0, %w0, %w3\n"
 "	stlxr	%w1, %w0, %2\n"
 "	cbnz	%w1, 1b"
@@ -88,6 +89,7 @@ static inline int atomic_sub_return(int i, atomic_t *v)
 	: "Ir" (i)
 	: "cc", "memory");
 
+	smp_mb();
 	return result;
 }
 
@@ -96,17 +98,20 @@ static inline int atomic_cmpxchg(atomic_t *ptr, int old, int new)
 	unsigned long tmp;
 	int oldval;
 
+	smp_mb();
+
 	asm volatile("// atomic_cmpxchg\n"
-"1:	ldaxr	%w1, %2\n"
+"1:	ldxr	%w1, %2\n"
 "	cmp	%w1, %w3\n"
 "	b.ne	2f\n"
-"	stlxr	%w0, %w4, %2\n"
+"	stxr	%w0, %w4, %2\n"
 "	cbnz	%w0, 1b\n"
 "2:"
 	: "=&r" (tmp), "=&r" (oldval), "+Q" (ptr->counter)
 	: "Ir" (old), "r" (new)
 	: "cc", "memory");
 
+	smp_mb();
 	return oldval;
 }
 
diff --git a/xen/include/asm-arm/arm64/system.h b/xen/include/asm-arm/arm64/system.h
index 570af5c..0db96e0 100644
--- a/xen/include/asm-arm/arm64/system.h
+++ b/xen/include/asm-arm/arm64/system.h
@@ -8,49 +8,50 @@ static inline unsigned long __xchg(unsigned long x, volatile void *ptr, int size
 {
         unsigned long ret, tmp;
 
-        switch (size) {
-        case 1:
-                asm volatile("//        __xchg1\n"
-                "1:     ldaxrb  %w0, %2\n"
-                "       stlxrb  %w1, %w3, %2\n"
-                "       cbnz    %w1, 1b\n"
-                        : "=&r" (ret), "=&r" (tmp), "+Q" (*(u8 *)ptr)
+	switch (size) {
+	case 1:
+		asm volatile("//	__xchg1\n"
+		"1:	ldxrb	%w0, %2\n"
+		"	stlxrb	%w1, %w3, %2\n"
+		"	cbnz	%w1, 1b\n"
+			: "=&r" (ret), "=&r" (tmp), "+Q" (*(u8 *)ptr)
                         : "r" (x)
                         : "cc", "memory");
-                break;
-        case 2:
-                asm volatile("//        __xchg2\n"
-                "1:     ldaxrh  %w0, %2\n"
-                "       stlxrh  %w1, %w3, %2\n"
-                "       cbnz    %w1, 1b\n"
-                        : "=&r" (ret), "=&r" (tmp), "+Q" (*(u16 *)ptr)
+		break;
+	case 2:
+		asm volatile("//	__xchg2\n"
+		"1:	ldxrh	%w0, %2\n"
+		"	stlxrh	%w1, %w3, %2\n"
+		"	cbnz	%w1, 1b\n"
+			: "=&r" (ret), "=&r" (tmp), "+Q" (*(u16 *)ptr)
                         : "r" (x)
                         : "cc", "memory");
-                break;
-        case 4:
-                asm volatile("//        __xchg4\n"
-                "1:     ldaxr   %w0, %2\n"
-                "       stlxr   %w1, %w3, %2\n"
-                "       cbnz    %w1, 1b\n"
-                        : "=&r" (ret), "=&r" (tmp), "+Q" (*(u32 *)ptr)
+		break;
+	case 4:
+		asm volatile("//	__xchg4\n"
+		"1:	ldxr	%w0, %2\n"
+		"	stlxr	%w1, %w3, %2\n"
+		"	cbnz	%w1, 1b\n"
+			: "=&r" (ret), "=&r" (tmp), "+Q" (*(u32 *)ptr)
                         : "r" (x)
                         : "cc", "memory");
-                break;
-        case 8:
-                asm volatile("//        __xchg8\n"
-                "1:     ldaxr   %0, %2\n"
-                "       stlxr   %w1, %3, %2\n"
-                "       cbnz    %w1, 1b\n"
-                        : "=&r" (ret), "=&r" (tmp), "+Q" (*(u64 *)ptr)
+		break;
+	case 8:
+		asm volatile("//	__xchg8\n"
+		"1:	ldxr	%0, %2\n"
+		"	stlxr	%w1, %3, %2\n"
+		"	cbnz	%w1, 1b\n"
+			: "=&r" (ret), "=&r" (tmp), "+Q" (*(u64 *)ptr)
                         : "r" (x)
                         : "cc", "memory");
                 break;
         default:
                 __bad_xchg(ptr, size), ret = 0;
                 break;
-        }
+	}
 
-        return ret;
+	smp_mb();
+	return ret;
 }
 
 #define xchg(ptr,x) \
