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[50.57.142.19]) by mx.google.com with ESMTPS id p8si448125vef.122.2014.04.08.08.15.10 for (version=TLSv1 cipher=RC4-SHA bits=128/128); Tue, 08 Apr 2014 08:15:11 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of xen-devel-bounces@lists.xen.org designates 50.57.142.19 as permitted sender) client-ip=50.57.142.19; Received: from localhost ([127.0.0.1] helo=lists.xen.org) by lists.xen.org with esmtp (Exim 4.72) (envelope-from ) id 1WXXie-0005KC-4Q; Tue, 08 Apr 2014 15:13:48 +0000 Received: from mail6.bemta4.messagelabs.com ([85.158.143.247]) by lists.xen.org with esmtp (Exim 4.72) (envelope-from ) id 1WXXic-0005Jd-5g for xen-devel@lists.xensource.com; Tue, 08 Apr 2014 15:13:46 +0000 Received: from [85.158.143.35:27745] by server-1.bemta-4.messagelabs.com id 36/58-09853-92214435; Tue, 08 Apr 2014 15:13:45 +0000 X-Env-Sender: Stefano.Stabellini@citrix.com X-Msg-Ref: server-4.tower-21.messagelabs.com!1396970023!7802972!1 X-Originating-IP: [66.165.176.63] X-SpamReason: No, hits=0.0 required=7.0 tests=sa_preprocessor: VHJ1c3RlZCBJUDogNjYuMTY1LjE3Ni42MyA9PiAzMDYwNDg=\n X-StarScan-Received: X-StarScan-Version: 6.11.1; banners=-,-,- X-VirusChecked: Checked Received: (qmail 7881 invoked from network); 8 Apr 2014 15:13:44 -0000 Received: from smtp02.citrix.com (HELO SMTP02.CITRIX.COM) (66.165.176.63) by server-4.tower-21.messagelabs.com with RC4-SHA encrypted SMTP; 8 Apr 2014 15:13:44 -0000 X-IronPort-AV: E=Sophos;i="4.97,818,1389744000"; d="scan'208";a="117915002" Received: from accessns.citrite.net (HELO FTLPEX01CL03.citrite.net) ([10.9.154.239]) by FTLPIPO02.CITRIX.COM with ESMTP; 08 Apr 2014 15:12:52 +0000 Received: from ukmail1.uk.xensource.com (10.80.16.128) by smtprelay.citrix.com (10.13.107.80) with Microsoft SMTP Server id 14.2.342.4; Tue, 8 Apr 2014 11:12:51 -0400 Received: from kaball.uk.xensource.com ([10.80.2.59]) by ukmail1.uk.xensource.com with esmtp (Exim 4.69) (envelope-from ) id 1WXXhj-0005Ms-QE; Tue, 08 Apr 2014 16:12:51 +0100 From: Stefano Stabellini To: Date: Tue, 8 Apr 2014 16:12:38 +0100 Message-ID: <1396969969-18973-1-git-send-email-stefano.stabellini@eu.citrix.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: References: MIME-Version: 1.0 X-DLP: MIA1 Cc: julien.grall@citrix.com, Ian.Campbell@citrix.com, stefano.stabellini@eu.citrix.com Subject: [Xen-devel] [PATCH v7 01/12] xen/arm: no need to set HCR_VI when using the vgic to inject irqs X-BeenThere: xen-devel@lists.xen.org X-Mailman-Version: 2.1.13 Precedence: list List-Id: List-Unsubscribe: , List-Post: , List-Help: , List-Subscribe: , Sender: xen-devel-bounces@lists.xen.org Errors-To: xen-devel-bounces@lists.xen.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: stefano.stabellini@eu.citrix.com X-Original-Authentication-Results: mx.google.com; spf=neutral (google.com: 209.85.128.172 is neither permitted nor denied by best guess record for domain of patch+caf_=patchwork-forward=linaro.org@linaro.org) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 List-Archive: HCR_VI forces the guest to resume execution in IRQ mode and can actually cause spurious interrupt injections. The GIC is capable of injecting interrupts into the guest and causing it to switch to IRQ mode automatically, without any need for the hypervisor to set HCR_VI manually. See ARM ARM B1.8.11 and chapter 5.4 of the Generic Interrupt Controller Architecture Specification. Signed-off-by: Stefano Stabellini Acked-by: Julien Grall Acked-by: Ian Campbell --- Changes in v4: - improve commit message. --- xen/arch/arm/gic.c | 20 -------------------- 1 file changed, 20 deletions(-) diff --git a/xen/arch/arm/gic.c b/xen/arch/arm/gic.c index 91a2982..b388ef3 100644 --- a/xen/arch/arm/gic.c +++ b/xen/arch/arm/gic.c @@ -726,22 +726,6 @@ void gic_clear_pending_irqs(struct vcpu *v) spin_unlock_irqrestore(&gic.lock, flags); } -static void gic_inject_irq_start(void) -{ - register_t hcr = READ_SYSREG(HCR_EL2); - WRITE_SYSREG(hcr | HCR_VI, HCR_EL2); - isb(); -} - -static void gic_inject_irq_stop(void) -{ - register_t hcr = READ_SYSREG(HCR_EL2); - if (hcr & HCR_VI) { - WRITE_SYSREG(hcr & ~HCR_VI, HCR_EL2); - isb(); - } -} - int gic_events_need_delivery(void) { return (!list_empty(¤t->arch.vgic.lr_pending) || @@ -754,10 +738,6 @@ void gic_inject(void) vgic_vcpu_inject_irq(current, current->domain->arch.evtchn_irq, 1); gic_restore_pending_irqs(current); - if (!gic_events_need_delivery()) - gic_inject_irq_stop(); - else - gic_inject_irq_start(); } int gic_route_irq_to_guest(struct domain *d, const struct dt_irq *irq,