From patchwork Fri Aug 24 16:58:15 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Julien Grall X-Patchwork-Id: 145089 Delivered-To: patch@linaro.org Received: by 2002:a2e:1648:0:0:0:0:0 with SMTP id 8-v6csp1475054ljw; Fri, 24 Aug 2018 10:00:47 -0700 (PDT) X-Google-Smtp-Source: ANB0VdYYV+mkm2FhRoPOJxg9o+ECbz9onaBIcq0o8mr+HdvnXT4mY6XIOgs0Nw3NLgGUVdEN4HC8 X-Received: by 2002:a24:4254:: with SMTP id i81-v6mr1986573itb.95.1535130047636; Fri, 24 Aug 2018 10:00:47 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1535130047; cv=none; d=google.com; s=arc-20160816; b=pd4CzIGyE5idDsj4h++GsZr2zZUv9X4H8XTMMTC81lSt+8eSBY+PFmKUX4MLWjguLD gLQ0i9jBkKRE36vPPKVC2cJozVuPpSkvweu5ViDPNVBONLs7g1sRscPuUKaX9wRgT4S8 nxDIAxl7VhnreJo8/vBebZFPdskumtAbqsrjA9pSolT2H+Zg/dZ8Wxnmzzcem31WhVKu UTeUqKcOADvqEbeN8ZLcVMX5trwgA8N5YZmqRFwcwNWd74Z5ZfU5rRc1gctBrsfXH9Um A13ehQmjKDtsmg86S8yCaKlqhy8a60oSR4s7uBWax9hfkzW40CD5AdkHSMdq9NRmuclJ Ejzw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:content-transfer-encoding:mime-version:cc :list-subscribe:list-help:list-post:list-unsubscribe:list-id :precedence:subject:references:in-reply-to:message-id:date:to:from :arc-authentication-results; bh=+4LZkqglJt9Unq00x6syBYUKMR9HKYJlXJ1nWPyewnI=; b=DFYJKxofDDC7fcbmmgm/vjl2UqNCWOOts12zuAhFSyUI3ZYQzPEdFXoEIsNaNtHYQg YhUDiN8+bGWGg3Rs97vJ/8iPOde5fxENTxuK7aR29XQ+HEnrhH+OfnG0lDGKOhuKKpNG gg3hiN5TuFKyXBmOgcONgEf4nihpam8uEs+ixjq8zbUqihSL55TgnPoimBmlFyoubbfA NQfEqBFB6ni/I61huFrFjjQlGKyCXwyr7WN9MuAVPsSUGAA9L4eYeMddUS4KhAYhkJ8F xvKMV4z2s7ozVn64/y1c2WM90eXcVuovUr9vqFztk7LeYdr6qfGAl/IXKT9dLkO02Miu RfrQ== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of xen-devel-bounces@lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org Return-Path: Received: from lists.xenproject.org (lists.xenproject.org. [192.237.175.120]) by mx.google.com with ESMTPS id l20-v6si5465742iom.167.2018.08.24.10.00.47 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Fri, 24 Aug 2018 10:00:47 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of xen-devel-bounces@lists.xenproject.org designates 192.237.175.120 as permitted sender) client-ip=192.237.175.120; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of xen-devel-bounces@lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.89) (envelope-from ) id 1ftFPr-00004u-Ij; Fri, 24 Aug 2018 16:58:31 +0000 Received: from all-amaz-eas1.inumbo.com ([34.197.232.57]) by lists.xenproject.org with esmtp (Exim 4.89) (envelope-from ) id 1ftFPq-0008WP-G2 for xen-devel@lists.xen.org; Fri, 24 Aug 2018 16:58:30 +0000 X-Inumbo-ID: 048ca3d2-a7bf-11e8-a6a9-d7ebe60f679a Received: from foss.arm.com (unknown [217.140.101.70]) by us1-amaz-eas1.inumbo.com (Halon) with ESMTP id 048ca3d2-a7bf-11e8-a6a9-d7ebe60f679a; Fri, 24 Aug 2018 16:59:09 +0000 (UTC) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 9999815A2; Fri, 24 Aug 2018 09:58:28 -0700 (PDT) Received: from e108454-lin.cambridge.arm.com (e108454-lin.Emea.Arm.com [10.4.12.35]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 8B3263F5A0; Fri, 24 Aug 2018 09:58:27 -0700 (PDT) From: Julien Grall To: xen-devel@lists.xen.org Date: Fri, 24 Aug 2018 17:58:15 +0100 Message-Id: <20180824165820.32620-2-julien.grall@arm.com> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20180824165820.32620-1-julien.grall@arm.com> References: <20180824165820.32620-1-julien.grall@arm.com> Subject: [Xen-devel] [PATCH 1/6] xen/arm: smccc-1.1: Make return values unsigned long X-BeenThere: xen-devel@lists.xenproject.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Cc: Marc Zyngier , Julien Grall , sstabellini@kernel.org, volodymyr_babchuk@epam.com MIME-Version: 1.0 Errors-To: xen-devel-bounces@lists.xenproject.org Sender: "Xen-devel" From: Marc Zyngier An unfortunate consequence of having a strong typing for the input values to the SMC call is that it also affects the type of the return values, limiting r0 to 32 bits and r{1,2,3} to whatever was passed as an input. Let's turn everything into "unsigned long", which satisfies the requirements of both architectures, and allows for the full range of return values. Reported-by: Stefano Stabellini Signed-off-by: Marc Zyngier Signed-off-by: Julien Grall Reviewed-by: Volodymyr Babchuk --- xen/include/asm-arm/smccc.h | 22 +++++++++++----------- 1 file changed, 11 insertions(+), 11 deletions(-) diff --git a/xen/include/asm-arm/smccc.h b/xen/include/asm-arm/smccc.h index 74c13f8419..a31d67a1de 100644 --- a/xen/include/asm-arm/smccc.h +++ b/xen/include/asm-arm/smccc.h @@ -119,35 +119,35 @@ struct arm_smccc_res { #define __declare_arg_0(a0, res) \ struct arm_smccc_res *___res = res; \ - register uin32_t r0 asm("r0") = a0; \ + register unsigned long r0 asm("r0") = (uint32_t)a0;\ register unsigned long r1 asm("r1"); \ register unsigned long r2 asm("r2"); \ register unsigned long r3 asm("r3") #define __declare_arg_1(a0, a1, res) \ struct arm_smccc_res *___res = res; \ - register uint32_t r0 asm("r0") = a0; \ - register typeof(a1) r1 asm("r1") = a1; \ + register unsigned long r0 asm("r0") = (uint32_t)a0;\ + register unsigned long r1 asm("r1") = a1; \ register unsigned long r2 asm("r2"); \ register unsigned long r3 asm("r3") #define __declare_arg_2(a0, a1, a2, res) \ struct arm_smccc_res *___res = res; \ - register u32 r0 asm("r0") = a0; \ - register typeof(a1) r1 asm("r1") = a1; \ - register typeof(a2) r2 asm("r2") = a2; \ + register unsigned long r0 asm("r0") = (uint32_t)a0;\ + register unsigned long r1 asm("r1") = a1; \ + register unsigned long r2 asm("r2") = a2; \ register unsigned long r3 asm("r3") #define __declare_arg_3(a0, a1, a2, a3, res) \ struct arm_smccc_res *___res = res; \ - register u32 r0 asm("r0") = a0; \ - register typeof(a1) r1 asm("r1") = a1; \ - register typeof(a2) r2 asm("r2") = a2; \ - register typeof(a3) r3 asm("r3") = a3 + register unsigned long r0 asm("r0") = (uint32_t)a0;\ + register unsigned long r1 asm("r1") = a1; \ + register unsigned long r2 asm("r2") = a2; \ + register unsigned long r3 asm("r3") = a3 #define __declare_arg_4(a0, a1, a2, a3, a4, res) \ __declare_arg_3(a0, a1, a2, a3, res); \ - register typeof(a4) r4 asm("r4") = a4 + register unsigned long r4 asm("r4") = a4 #define __declare_arg_5(a0, a1, a2, a3, a4, a5, res) \ __declare_arg_4(a0, a1, a2, a3, a4, res); \