From patchwork Fri Aug 24 16:58:16 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Julien Grall X-Patchwork-Id: 145093 Delivered-To: patch@linaro.org Received: by 2002:a2e:1648:0:0:0:0:0 with SMTP id 8-v6csp1475105ljw; Fri, 24 Aug 2018 10:00:50 -0700 (PDT) X-Google-Smtp-Source: ANB0Vdbc0LVB27UYAtdTpIwsU1rm5j1XFFHKId6ZXAV+J3X7FwNOSB194cjeUqIVZgQZygr/rKz5 X-Received: by 2002:a24:8782:: with SMTP id f124-v6mr1975751ite.87.1535130050048; Fri, 24 Aug 2018 10:00:50 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1535130050; cv=none; d=google.com; s=arc-20160816; b=tw7XrSAIaeNDJq30cUhfK/yNztg3rrmGM+N5mcnt01Zy5Xa4+LqSe8RfKB9o4ECLfT 8dCQN2+vY7IkdWZ+lxZTxkRvkyoC+NcMvi6xPYA5f+TzFKv1HI9+MGV9Nc+CdPYdGdbP f4D6OmBUgpbGq4tghIClG1CFDoy4IEqnDtjQ2ynrGvjXgzCLjXqY5UGWvhP8MLghWuTC yVc8+pmcqE4Z1zjGHyW4dZxSCB4krCH7sRIjMQYUJXWYOghCbScWjGyxyoyOEFh+zbmC 6UZmsCfwmYZ+dTB3kf6Zw+Xy55kdQagSvug5mhFVNpfhXy8jNZTT3s6rTL+PzU7+wRC+ o1qQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:content-transfer-encoding:mime-version:cc :list-subscribe:list-help:list-post:list-unsubscribe:list-id :precedence:subject:references:in-reply-to:message-id:date:to:from :arc-authentication-results; bh=FpReXh2T4Yb2iiw/Hp9X9IYrZeVWYZmDhflp1fUHyic=; b=kThDJeQyvflQc07Mzk4yrLa/N41NbOhPNlLtYA+ic7WLQrVQ6eteido9fVsWB73hUJ IEq4noIJDxqoMXlHRk2Tz75yjmlDqVFOFRZYGSsSIuuJzi05Dcv50/mjefPwBKVHrnOs xU+PTelTgs1uVnyzfwmq5+MzMCgMahkbStzRkwsn+epXxBsx1B93gomOvuEnme4eliBP de6SkefC32bOl+I2FYa/8cmG3a6k5XPYRxghu7ifVS1GkqQQvBGorwmDR36zcaJ+Ohwr dTFSbmEskN6R4JTQtQ2vepXeB4kHdlNrlxX2By7QzYkJRM/7yEeeyT5uJSYWs9ab/gCW wfrA== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of xen-devel-bounces@lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org Return-Path: Received: from lists.xenproject.org (lists.xenproject.org. [192.237.175.120]) by mx.google.com with ESMTPS id 63-v6si1301025ito.9.2018.08.24.10.00.49 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Fri, 24 Aug 2018 10:00:49 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of xen-devel-bounces@lists.xenproject.org designates 192.237.175.120 as permitted sender) client-ip=192.237.175.120; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of xen-devel-bounces@lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.89) (envelope-from ) id 1ftFPs-00005T-Br; Fri, 24 Aug 2018 16:58:32 +0000 Received: from us1-rack-dfw2.inumbo.com ([104.130.134.6]) by lists.xenproject.org with esmtp (Exim 4.89) (envelope-from ) id 1ftFPr-00004t-Mk for xen-devel@lists.xen.org; Fri, 24 Aug 2018 16:58:31 +0000 X-Inumbo-ID: bd05feb5-a7be-11e8-a8a5-bc764e045a96 Received: from foss.arm.com (unknown [217.140.101.70]) by us1-rack-dfw2.inumbo.com (Halon) with ESMTP id bd05feb5-a7be-11e8-a8a5-bc764e045a96; Fri, 24 Aug 2018 18:57:09 +0200 (CEST) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id CB61B80D; Fri, 24 Aug 2018 09:58:29 -0700 (PDT) Received: from e108454-lin.cambridge.arm.com (e108454-lin.Emea.Arm.com [10.4.12.35]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id D79E23F5A0; Fri, 24 Aug 2018 09:58:28 -0700 (PDT) From: Julien Grall To: xen-devel@lists.xen.org Date: Fri, 24 Aug 2018 17:58:16 +0100 Message-Id: <20180824165820.32620-3-julien.grall@arm.com> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20180824165820.32620-1-julien.grall@arm.com> References: <20180824165820.32620-1-julien.grall@arm.com> Subject: [Xen-devel] [PATCH 2/6] xen/arm: smccc-1.1: Handle function result as parameters X-BeenThere: xen-devel@lists.xenproject.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Cc: Marc Zyngier , sstabellini@kernel.org, volodymyr_babchuk@epam.com MIME-Version: 1.0 Errors-To: xen-devel-bounces@lists.xenproject.org Sender: "Xen-devel" From: Marc Zyngier If someone has the silly idea to write something along those lines: extern u64 foo(void); void bar(struct arm_smccc_res *res) { arm_smccc_1_1_smc(0xbad, foo(), res); } they are in for a surprise, as this gets compiled as: 0000000000000588 : 588: a9be7bfd stp x29, x30, [sp, #-32]! 58c: 910003fd mov x29, sp 590: f9000bf3 str x19, [sp, #16] 594: aa0003f3 mov x19, x0 598: aa1e03e0 mov x0, x30 59c: 94000000 bl 0 <_mcount> 5a0: 94000000 bl 0 5a4: aa0003e1 mov x1, x0 5a8: d4000003 smc #0x0 5ac: b4000073 cbz x19, 5b8 5b0: a9000660 stp x0, x1, [x19] 5b4: a9010e62 stp x2, x3, [x19, #16] 5b8: f9400bf3 ldr x19, [sp, #16] 5bc: a8c27bfd ldp x29, x30, [sp], #32 5c0: d65f03c0 ret 5c4: d503201f nop The call to foo "overwrites" the x0 register for the return value, and we end up calling the wrong secure service. A solution is to evaluate all the parameters before assigning anything to specific registers, leading to the expected result: 0000000000000588 : 588: a9be7bfd stp x29, x30, [sp, #-32]! 58c: 910003fd mov x29, sp 590: f9000bf3 str x19, [sp, #16] 594: aa0003f3 mov x19, x0 598: aa1e03e0 mov x0, x30 59c: 94000000 bl 0 <_mcount> 5a0: 94000000 bl 0 5a4: aa0003e1 mov x1, x0 5a8: d28175a0 mov x0, #0xbad 5ac: d4000003 smc #0x0 5b0: b4000073 cbz x19, 5bc 5b4: a9000660 stp x0, x1, [x19] 5b8: a9010e62 stp x2, x3, [x19, #16] 5bc: f9400bf3 ldr x19, [sp, #16] 5c0: a8c27bfd ldp x29, x30, [sp], #32 5c4: d65f03c0 ret Reported-by: Stefano Stabellini Signed-off-by: Marc Zyngier Reviewed-by: Volodymyr Babchuk --- xen/include/asm-arm/smccc.h | 30 ++++++++++++++++++++---------- 1 file changed, 20 insertions(+), 10 deletions(-) diff --git a/xen/include/asm-arm/smccc.h b/xen/include/asm-arm/smccc.h index a31d67a1de..648bef28bd 100644 --- a/xen/include/asm-arm/smccc.h +++ b/xen/include/asm-arm/smccc.h @@ -125,41 +125,51 @@ struct arm_smccc_res { register unsigned long r3 asm("r3") #define __declare_arg_1(a0, a1, res) \ + typeof(a1) __a1 = a1; \ struct arm_smccc_res *___res = res; \ register unsigned long r0 asm("r0") = (uint32_t)a0;\ - register unsigned long r1 asm("r1") = a1; \ + register unsigned long r1 asm("r1") = __a1; \ register unsigned long r2 asm("r2"); \ register unsigned long r3 asm("r3") #define __declare_arg_2(a0, a1, a2, res) \ + typeof(a1) __a1 = a1; \ + typeof(a2) __a2 = a2; \ struct arm_smccc_res *___res = res; \ register unsigned long r0 asm("r0") = (uint32_t)a0;\ - register unsigned long r1 asm("r1") = a1; \ - register unsigned long r2 asm("r2") = a2; \ + register unsigned long r1 asm("r1") = __a1; \ + register unsigned long r2 asm("r2") = __a2; \ register unsigned long r3 asm("r3") #define __declare_arg_3(a0, a1, a2, a3, res) \ + typeof(a1) __a1 = a1; \ + typeof(a2) __a2 = a2; \ + typeof(a3) __a3 = a3; \ struct arm_smccc_res *___res = res; \ register unsigned long r0 asm("r0") = (uint32_t)a0;\ - register unsigned long r1 asm("r1") = a1; \ - register unsigned long r2 asm("r2") = a2; \ - register unsigned long r3 asm("r3") = a3 + register unsigned long r1 asm("r1") = __a1; \ + register unsigned long r2 asm("r2") = __a2; \ + register unsigned long r3 asm("r3") = __a3 #define __declare_arg_4(a0, a1, a2, a3, a4, res) \ + typeof(a4) __a4 = a4; \ __declare_arg_3(a0, a1, a2, a3, res); \ - register unsigned long r4 asm("r4") = a4 + register unsigned long r4 asm("r4") = __a4 #define __declare_arg_5(a0, a1, a2, a3, a4, a5, res) \ + typeof(a5) __a5 = a5; \ __declare_arg_4(a0, a1, a2, a3, a4, res); \ - register typeof(a5) r5 asm("r5") = a5 + register typeof(a5) r5 asm("r5") = __a5 #define __declare_arg_6(a0, a1, a2, a3, a4, a5, a6, res) \ + typeof(a6) __a6 = a6; \ __declare_arg_5(a0, a1, a2, a3, a4, a5, res); \ - register typeof(a6) r6 asm("r6") = a6 + register typeof(a6) r6 asm("r6") = __a6 #define __declare_arg_7(a0, a1, a2, a3, a4, a5, a6, a7, res) \ + typeof(a7) __a7 = a7; \ __declare_arg_6(a0, a1, a2, a3, a4, a5, a6, res); \ - register typeof(a7) r7 asm("r7") = a7 + register typeof(a7) r7 asm("r7") = __a7 #define ___declare_args(count, ...) __declare_arg_ ## count(__VA_ARGS__) #define __declare_args(count, ...) ___declare_args(count, __VA_ARGS__)