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[192.237.175.120]) by mx.google.com with ESMTPS id n70-v6si1910012ion.245.2018.09.25.10.23.20 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Tue, 25 Sep 2018 10:23:21 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of xen-devel-bounces@lists.xenproject.org designates 192.237.175.120 as permitted sender) client-ip=192.237.175.120; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of xen-devel-bounces@lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.89) (envelope-from ) id 1g4r16-0004Au-4B; Tue, 25 Sep 2018 17:20:56 +0000 Received: from us1-rack-dfw2.inumbo.com ([104.130.134.6]) by lists.xenproject.org with esmtp (Exim 4.89) (envelope-from ) id 1g4r14-0004Aa-VJ for xen-devel@lists.xen.org; Tue, 25 Sep 2018 17:20:54 +0000 X-Inumbo-ID: 0d8db9c2-c0e7-11e8-a8a5-bc764e045a96 Received: from foss.arm.com (unknown [217.140.101.70]) by us1-rack-dfw2.inumbo.com (Halon) with ESMTP id 0d8db9c2-c0e7-11e8-a8a5-bc764e045a96; Tue, 25 Sep 2018 19:18:43 +0200 (CEST) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 0CFB415AD; Tue, 25 Sep 2018 10:20:54 -0700 (PDT) Received: from e108454-lin.cambridge.arm.com (e108454-lin.Emea.Arm.com [10.4.12.35]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id EFAA83F5BD; Tue, 25 Sep 2018 10:20:52 -0700 (PDT) From: Julien Grall To: xen-devel@lists.xen.org Date: Tue, 25 Sep 2018 18:20:40 +0100 Message-Id: <20180925172043.20248-4-julien.grall@arm.com> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20180925172043.20248-1-julien.grall@arm.com> References: <20180925172043.20248-1-julien.grall@arm.com> Subject: [Xen-devel] [PATCH v2 3/6] xen/arm: add SMC wrapper that is compatible with SMCCC v1.0 X-BeenThere: xen-devel@lists.xenproject.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Cc: "Edgar E. Iglesias" , Julien Grall , sstabellini@kernel.org, volodymyr_babchuk@epam.com MIME-Version: 1.0 Errors-To: xen-devel-bounces@lists.xenproject.org Sender: "Xen-devel" From: Volodymyr Babchuk Existing SMC wrapper call_smc() allows only 4 parameters and returns only one value. This is enough for existing use in PSCI code, but TEE mediator will need a call that is fully compatible with ARM SMCCC v1.0. This patch adds a wrapper for both arm32 and arm64. In the case of arm32, the wrapper is just an alias to the ARM SMCCC v1.1 as the convention is the same. CC: "Edgar E. Iglesias" Signed-off-by: Volodymyr Babchuk [julien: Rework the wrapper to make it closer to SMCC 1.1 wrapper] Signed-off-by: Julien Grall Reviewed-by: Stefano Stabellini --- xen/arch/arm/arm64/Makefile | 1 + xen/arch/arm/arm64/asm-offsets.c | 5 ++++ xen/arch/arm/arm64/smc.S | 32 +++++++++++++++++++++++++ xen/include/asm-arm/smccc.h | 51 +++++++++++++++++++++++++++++++++++++++- 4 files changed, 88 insertions(+), 1 deletion(-) create mode 100644 xen/arch/arm/arm64/smc.S diff --git a/xen/arch/arm/arm64/Makefile b/xen/arch/arm/arm64/Makefile index bb5c610b2a..c4f3a28a0d 100644 --- a/xen/arch/arm/arm64/Makefile +++ b/xen/arch/arm/arm64/Makefile @@ -8,6 +8,7 @@ obj-y += domain.o obj-y += entry.o obj-y += insn.o obj-$(CONFIG_LIVEPATCH) += livepatch.o +obj-y += smc.o obj-y += smpboot.o obj-y += traps.o obj-y += vfp.o diff --git a/xen/arch/arm/arm64/asm-offsets.c b/xen/arch/arm/arm64/asm-offsets.c index 62833d8c8b..280ddb55bf 100644 --- a/xen/arch/arm/arm64/asm-offsets.c +++ b/xen/arch/arm/arm64/asm-offsets.c @@ -10,6 +10,7 @@ #include #include #include +#include #define DEFINE(_sym, _val) \ asm volatile ("\n.ascii\"==>#define " #_sym " %0 /* " #_val " */<==\"" \ @@ -51,6 +52,10 @@ void __dummy__(void) BLANK(); OFFSET(INITINFO_stack, struct init_info, stack); + + BLANK(); + OFFSET(SMCCC_RES_a0, struct arm_smccc_res, a0); + OFFSET(SMCCC_RES_a2, struct arm_smccc_res, a2); } /* diff --git a/xen/arch/arm/arm64/smc.S b/xen/arch/arm/arm64/smc.S new file mode 100644 index 0000000000..b0752be57e --- /dev/null +++ b/xen/arch/arm/arm64/smc.S @@ -0,0 +1,32 @@ +/* + * xen/arch/arm/arm64/smc.S + * + * Wrapper for Secure Monitors Calls + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include +#include + +/* + * void __arm_smccc_1_0_smc(register_t a0, register_t a1, register_t a2, + * register_t a3, register_t a4, register_t a5, + * register_t a6, register_t a7, + * struct arm_smccc_res *res) + */ +ENTRY(__arm_smccc_1_0_smc) + smc #0 + ldr x4, [sp] + cbz x4, 1f /* No need to store the result */ + stp x0, x1, [x4, #SMCCC_RES_a0] + stp x2, x3, [x4, #SMCCC_RES_a2] +1: + ret diff --git a/xen/include/asm-arm/smccc.h b/xen/include/asm-arm/smccc.h index 648bef28bd..1ed6cbaa48 100644 --- a/xen/include/asm-arm/smccc.h +++ b/xen/include/asm-arm/smccc.h @@ -207,7 +207,56 @@ struct arm_smccc_res { *___res = (typeof(*___res)){r0, r1, r2, r3}; \ } while ( 0 ) -#endif +/* + * The calling convention for arm32 is the same for both SMCCC v1.0 and + * v1.1. + */ +#ifdef CONFIG_ARM_32 +#define arm_smccc_1_0_smc(...) arm_smccc_1_1_smc(__VA_ARGS__) +#else + +void __arm_smccc_1_0_smc(register_t a0, register_t a1, register_t a2, + register_t a3, register_t a4, register_t a5, + register_t a6, register_t a7, + struct arm_smccc_res *res); + +/* Macros to handle variadic parameter for SMCCC v1.0 helper */ +#define __arm_smccc_1_0_smc_7(a0, a1, a2, a3, a4, a5, a6, a7, res) \ + __arm_smccc_1_0_smc(a0, a1, a2, a3, a4, a5, a6, a7, res) + +#define __arm_smccc_1_0_smc_6(a0, a1, a2, a3, a4, a5, a6, res) \ + __arm_smccc_1_0_smc_7(a0, a1, a2, a3, a4, a5, a6, 0, res) + +#define __arm_smccc_1_0_smc_5(a0, a1, a2, a3, a4, a5, res) \ + __arm_smccc_1_0_smc_6(a0, a1, a2, a3, a4, a5, 0, res) + +#define __arm_smccc_1_0_smc_4(a0, a1, a2, a3, a4, res) \ + __arm_smccc_1_0_smc_5(a0, a1, a2, a3, a4, 0, res) + +#define __arm_smccc_1_0_smc_3(a0, a1, a2, a3, res) \ + __arm_smccc_1_0_smc_4(a0, a1, a2, a3, 0, res) + +#define __arm_smccc_1_0_smc_2(a0, a1, a2, res) \ + __arm_smccc_1_0_smc_3(a0, a1, a2, 0, res) + +#define __arm_smccc_1_0_smc_1(a0, a1, res) \ + __arm_smccc_1_0_smc_2(a0, a1, 0, res) + +#define __arm_smccc_1_0_smc_0(a0, res) \ + __arm_smccc_1_0_smc_1(a0, 0, res) + +#define ___arm_smccc_1_0_smc_count(count, ...) \ + __arm_smccc_1_0_smc_ ## count(__VA_ARGS__) + +#define __arm_smccc_1_0_smc_count(count, ...) \ + ___arm_smccc_1_0_smc_count(count, __VA_ARGS__) + +#define arm_smccc_1_0_smc(...) \ + __arm_smccc_1_0_smc_count(__count_args(__VA_ARGS__), __VA_ARGS__) + +#endif /* CONFIG_ARM_64 */ + +#endif /* __ASSEMBLY__ */ /* * Construct function identifier from call type (fast or standard),