diff mbox series

[RFC,17/37] ASoC: Intel: avs: Dynamic firmware resources management

Message ID 20211208111301.1817725-18-cezary.rojewski@intel.com
State Superseded
Headers show
Series ASoC: Intel: AVS - Audio DSP for cAVS | expand

Commit Message

Cezary Rojewski Dec. 8, 2021, 11:12 a.m. UTC 
Wrap elementary DSP-core operations and resource control into more
complex handlers. This is done to reduce the number of invocations of
wrapped operations throughout the driver as order of operations matters -
most flows involve register manipulation and IPCs combined.

Signed-off-by: Amadeusz Sławiński <amadeuszx.slawinski@linux.intel.com>
Signed-off-by: Cezary Rojewski <cezary.rojewski@intel.com>
---
 sound/soc/intel/avs/avs.h |  14 ++++
 sound/soc/intel/avs/dsp.c | 172 ++++++++++++++++++++++++++++++++++++++
 2 files changed, 186 insertions(+)

Comments

Mark Brown Dec. 21, 2021, 2:40 p.m. UTC | #1 
On Wed, Dec 08, 2021 at 12:12:41PM +0100, Cezary Rojewski wrote:

> +int avs_dsp_get_core(struct avs_dev *adev, u32 core_id)
> +{

...

> +	if (atomic_add_return(1, ref) == 1) {
> +		ret = avs_dsp_enable(adev, mask);
> +		if (ret)
> +			goto err_enable_dsp;
> +	}

> +int avs_dsp_put_core(struct avs_dev *adev, u32 core_id)
> +{

...

> +	ref = &adev->core_refs[core_id];
> +	if (atomic_dec_and_test(ref)) {
> +		ret = avs_dsp_disable(adev, mask);

This looks wrong - there's nothing that ensures that we don't get
a sequence like:

	CPU0		CPU1
	decrement
			increment
			enable DSP
	disable DSP

that I can see here?  Either there's a lock missing which ensures
that the actual DSP management is in sync with the refcount or
there's no need for the use of atomics since the wider lock will
ensure that only one thing could be updating at once.  In general
I'd expect something heavier weight than atomics.
Cezary Rojewski Dec. 21, 2021, 5:07 p.m. UTC | #2 
On 2021-12-21 3:40 PM, Mark Brown wrote:
> On Wed, Dec 08, 2021 at 12:12:41PM +0100, Cezary Rojewski wrote:
> 
>> +int avs_dsp_get_core(struct avs_dev *adev, u32 core_id)
>> +{
> 
> ...
> 
>> +	if (atomic_add_return(1, ref) == 1) {
>> +		ret = avs_dsp_enable(adev, mask);
>> +		if (ret)
>> +			goto err_enable_dsp;
>> +	}
> 
>> +int avs_dsp_put_core(struct avs_dev *adev, u32 core_id)
>> +{
> 
> ...
> 
>> +	ref = &adev->core_refs[core_id];
>> +	if (atomic_dec_and_test(ref)) {
>> +		ret = avs_dsp_disable(adev, mask);
> 
> This looks wrong - there's nothing that ensures that we don't get
> a sequence like:
> 
> 	CPU0		CPU1
> 	decrement
> 			increment
> 			enable DSP
> 	disable DSP
> 
> that I can see here?  Either there's a lock missing which ensures
> that the actual DSP management is in sync with the refcount or
> there's no need for the use of atomics since the wider lock will
> ensure that only one thing could be updating at once.  In general
> I'd expect something heavier weight than atomics.

Keen eye, Mark. In fact, you're right in both statements:

- assuming there is no wider lock, existing usage of atomics won't 
prevent possible race for enable/disable of DSP carried as a consequence 
to ->core_refs manipulation

- there is a wider lock indeed, and that's why we haven't encountered 
the problem I guess. It's ->path_mutex, a member of struct avs_dev. Said 
mutex is introduced in:
[PATCH 19/37] ASoC: Intel: avs: Path management

along with its usage. By the usage I mean the following:
avs_dsp_put_core() and avs_dsp_get_core() are called only within 
avs_dsp_init_module() and avs_dsp_delete_module(). The latter two are 
part of 'struct avs_path *' instances creation and deletion procedure: 
avs_path_create() and avs_path_free(). Both avs_path_create() and 
avs_path_free() lock ->path_mutex before doing anything.

I admit that answer to question: "which approach fits best here?" will 
probably need to wait for the Christmas break to be over. While myself 
I'm in favour of synchronizing avs_dsp_put_core() and avs_dsp_get_core() 
locally as it scales better into the future and we won't get caught 
unprepared when avs_path_create() and avs_path_free() stop being the 
only places for their usage, such decision need to be made by the team 
as a whole.

One more thing came into my mind during this discussion: 
avs_dsp_put_core() and avs_dsp_get_core() should probably be 'static' - 
as it was said earlier, these are not used outside of the dsp.c file.

Once again, good finding Mark, thank you.


Regards,
Czarek
diff mbox series

Patch

diff --git a/sound/soc/intel/avs/avs.h b/sound/soc/intel/avs/avs.h
index d12b19a7299b..44b3b87a10b9 100644
--- a/sound/soc/intel/avs/avs.h
+++ b/sound/soc/intel/avs/avs.h
@@ -74,6 +74,7 @@  struct avs_dev {
 	struct mutex modres_mutex;
 	struct ida ppl_ida;
 	struct list_head fw_list;
+	atomic_t *core_refs;
 
 	struct completion fw_ready;
 };
@@ -94,6 +95,10 @@  int avs_dsp_core_reset(struct avs_dev *adev, u32 core_mask, bool reset);
 int avs_dsp_core_stall(struct avs_dev *adev, u32 core_mask, bool stall);
 int avs_dsp_core_enable(struct avs_dev *adev, u32 core_mask);
 int avs_dsp_core_disable(struct avs_dev *adev, u32 core_mask);
+int avs_dsp_enable(struct avs_dev *adev, u32 core_mask);
+int avs_dsp_disable(struct avs_dev *adev, u32 core_mask);
+int avs_dsp_get_core(struct avs_dev *adev, u32 core_id);
+int avs_dsp_put_core(struct avs_dev *adev, u32 core_id);
 
 /* Inter Process Communication */
 
@@ -183,4 +188,13 @@  void avs_module_id_free(struct avs_dev *adev, u16 module_id, u8 instance_id);
 int avs_request_firmware(struct avs_dev *adev, const struct firmware **fw_p, const char *name);
 void avs_release_firmwares(struct avs_dev *adev);
 
+int avs_dsp_init_module(struct avs_dev *adev, u16 module_id, u8 ppl_instance_id,
+			u8 core_id, u8 domain, void *param, u32 param_size,
+			u16 *instance_id);
+void avs_dsp_delete_module(struct avs_dev *adev, u16 module_id, u16 instance_id,
+			   u8 ppl_instance_id, u8 core_id);
+int avs_dsp_create_pipeline(struct avs_dev *adev, u16 req_size, u8 priority,
+			    bool lp, u16 attributes, u8 *instance_id);
+int avs_dsp_delete_pipeline(struct avs_dev *adev, u8 instance_id);
+
 #endif /* __SOUND_SOC_INTEL_AVS_H */
diff --git a/sound/soc/intel/avs/dsp.c b/sound/soc/intel/avs/dsp.c
index 258544277bbb..5e6b0ecbd255 100644
--- a/sound/soc/intel/avs/dsp.c
+++ b/sound/soc/intel/avs/dsp.c
@@ -104,4 +104,176 @@  int avs_dsp_core_disable(struct avs_dev *adev, u32 core_mask)
 	return avs_dsp_op(adev, power, core_mask, false);
 }
 
+int avs_dsp_enable(struct avs_dev *adev, u32 core_mask)
+{
+	u32 mask;
+	int ret;
+
+	ret = avs_dsp_core_enable(adev, core_mask);
+	if (ret < 0)
+		return ret;
+
+	mask = core_mask & ~AVS_MAIN_CORE_MASK;
+	if (!mask)
+		/*
+		 * without main core, fw is dead anyway
+		 * so setting D0 for it is futile.
+		 */
+		return 0;
+
+	ret = avs_ipc_set_dx(adev, mask, true);
+	return AVS_IPC_RET(ret);
+}
+
+int avs_dsp_disable(struct avs_dev *adev, u32 core_mask)
+{
+	int ret;
+
+	ret = avs_ipc_set_dx(adev, core_mask, false);
+	if (ret)
+		return AVS_IPC_RET(ret);
+
+	return avs_dsp_core_disable(adev, core_mask);
+}
+
+int avs_dsp_get_core(struct avs_dev *adev, u32 core_id)
+{
+	atomic_t *ref;
+	u32 mask;
+	int ret;
+
+	mask = BIT_MASK(core_id);
+	if (mask == AVS_MAIN_CORE_MASK)
+		/* nothing to do for main core */
+		return 0;
+	if (core_id >= adev->hw_cfg.dsp_cores) {
+		ret = -EINVAL;
+		goto err;
+	}
+
+	ref = &adev->core_refs[core_id];
+	if (atomic_add_return(1, ref) == 1) {
+		ret = avs_dsp_enable(adev, mask);
+		if (ret)
+			goto err_enable_dsp;
+	}
+
+	return 0;
+
+err_enable_dsp:
+	atomic_dec(ref);
+err:
+	dev_err(adev->dev, "get core failed: %d\n", ret);
+	return ret;
+}
+
+int avs_dsp_put_core(struct avs_dev *adev, u32 core_id)
+{
+	atomic_t *ref;
+	u32 mask;
+	int ret;
+
+	mask = BIT_MASK(core_id);
+	if (mask == AVS_MAIN_CORE_MASK)
+		/* nothing to do for main core */
+		return 0;
+	if (core_id >= adev->hw_cfg.dsp_cores) {
+		ret = -EINVAL;
+		goto err;
+	}
+
+	ref = &adev->core_refs[core_id];
+	if (atomic_dec_and_test(ref)) {
+		ret = avs_dsp_disable(adev, mask);
+		if (ret)
+			goto err;
+	}
+
+	return 0;
+err:
+	dev_err(adev->dev, "put core failed: %d\n", ret);
+	return ret;
+}
+
+int avs_dsp_init_module(struct avs_dev *adev, u16 module_id, u8 ppl_instance_id,
+			u8 core_id, u8 domain, void *param, u32 param_size,
+			u16 *instance_id)
+{
+	struct avs_module_entry mentry;
+	int ret, id;
+
+	id = avs_module_id_alloc(adev, module_id);
+	if (id < 0)
+		return id;
+
+	ret = avs_get_module_id_entry(adev, module_id, &mentry);
+	if (ret)
+		goto err_mod_entry;
+
+	ret = avs_dsp_get_core(adev, core_id);
+	if (ret)
+		goto err_mod_entry;
+
+	ret = avs_ipc_init_instance(adev, module_id, id, ppl_instance_id,
+				    core_id, domain, param, param_size);
+	if (ret) {
+		ret = AVS_IPC_RET(ret);
+		goto err_ipc;
+	}
+
+	*instance_id = id;
+	return 0;
+
+err_ipc:
+	avs_dsp_put_core(adev, core_id);
+err_mod_entry:
+	avs_module_id_free(adev, module_id, id);
+	return ret;
+}
+
+void avs_dsp_delete_module(struct avs_dev *adev, u16 module_id, u16 instance_id,
+			   u8 ppl_instance_id, u8 core_id)
+{
+	/* Modules not owned by any pipeline need to be freed explicitly. */
+	if (ppl_instance_id == INVALID_PIPELINE_ID)
+		avs_ipc_delete_instance(adev, module_id, instance_id);
+
+	avs_module_id_free(adev, module_id, instance_id);
+
+	avs_dsp_put_core(adev, core_id);
+}
+
+int avs_dsp_create_pipeline(struct avs_dev *adev, u16 req_size, u8 priority,
+			    bool lp, u16 attributes, u8 *instance_id)
+{
+	struct avs_fw_cfg *fw_cfg = &adev->fw_cfg;
+	int ret, id;
+
+	id = ida_alloc_max(&adev->ppl_ida, fw_cfg->max_ppl_count - 1, GFP_KERNEL);
+	if (id < 0)
+		return id;
+
+	ret = avs_ipc_create_pipeline(adev, req_size, priority, id, lp,
+				      attributes);
+	if (ret) {
+		ida_free(&adev->ppl_ida, id);
+		return AVS_IPC_RET(ret);
+	}
+
+	*instance_id = id;
+	return 0;
+}
+
+int avs_dsp_delete_pipeline(struct avs_dev *adev, u8 instance_id)
+{
+	int ret;
+
+	ret = avs_ipc_delete_pipeline(adev, instance_id);
+	if (ret)
+		ret = AVS_IPC_RET(ret);
+
+	ida_free(&adev->ppl_ida, instance_id);
+	return ret;
+}
+
 MODULE_LICENSE("GPL v2");