diff --git a/Documentation/devicetree/bindings/sound/adi,adau7118.yaml b/Documentation/devicetree/bindings/sound/adi,adau7118.yaml
index fb78967ee17b..71e8a9ff2edf 100644
--- a/Documentation/devicetree/bindings/sound/adi,adau7118.yaml
+++ b/Documentation/devicetree/bindings/sound/adi,adau7118.yaml
@@ -51,6 +51,27 @@ properties:
       maximum: 1
     default: [0, 0, 1, 1]
 
+  adi,pdm-clk0-ds:
+    description: |
+      This property set the drive strength of PDM CLK0 output pad.
+    $ref: /schemas/types.yaml#/definitions/uint32
+    enum: [3, 2, 1, 0]
+    default: 2
+
+  adi,pdm-clk1-ds:
+    description: |
+      This property set the drive strength of PDM CLK1 output pad.
+    $ref: /schemas/types.yaml#/definitions/uint32
+    enum: [3, 2, 1, 0]
+    default: 2
+
+  adi,sdata-ds:
+    description: |
+      This property set the drive strength of SDATA output pad.
+    $ref: /schemas/types.yaml#/definitions/uint32
+    enum: [3, 2, 1, 0]
+    default: 2
+
 required:
   - "#sound-dai-cells"
   - compatible
@@ -73,6 +94,9 @@ examples:
                 dvdd-supply = <&supply>;
                 adi,pdm-clk-map = <1 1 0 0>;
                 adi,decimation-ratio = <16>;
+                adi,pdm-clk0-ds = <3>;
+                adi,pdm-clk1-ds = <3>;
+                adi,sdata-ds = <3>;
         };
     };
 
diff --git a/sound/soc/codecs/adau7118.c b/sound/soc/codecs/adau7118.c
index 841229dcbca1..18c1f246f911 100644
--- a/sound/soc/codecs/adau7118.c
+++ b/sound/soc/codecs/adau7118.c
@@ -29,6 +29,12 @@
 				FIELD_PREP(ADAU7118_LRCLK_BCLK_POL_MASK, x)
 #define ADAU7118_SPT_SLOT_MASK		GENMASK(7, 4)
 #define ADAU7118_SPT_SLOT(x)		FIELD_PREP(ADAU7118_SPT_SLOT_MASK, x)
+#define ADAU7118_DS_PDM_CLK0_MASK	GENMASK(1, 0)
+#define ADAU7118_DS_PDM_CLK0(x)		FIELD_PREP(ADAU7118_DS_PDM_CLK0_MASK, x)
+#define ADAU7118_DS_PDM_CLK1_MASK	GENMASK(3, 2)
+#define ADAU7118_DS_PDM_CLK1(x)		FIELD_PREP(ADAU7118_DS_PDM_CLK1_MASK, x)
+#define ADAU7118_DS_SDATA_MASK		GENMASK(5, 4)
+#define ADAU7118_DS_SDATA(x)		FIELD_PREP(ADAU7118_DS_SDATA_MASK, x)
 #define ADAU7118_FULL_SOFT_R_MASK	BIT(1)
 #define ADAU7118_FULL_SOFT_R(x)		FIELD_PREP(ADAU7118_FULL_SOFT_R_MASK, x)
 
@@ -489,7 +495,7 @@ static int adau7118_regulator_setup(struct adau7118_data *st)
 static int adau7118_parset_dt(const struct adau7118_data *st)
 {
 	int ret;
-	u32 dec_ratio = 0;
+	u32 val32 = 0;
 	/* 4 inputs */
 	u32 clk_map[4], regval;
 
@@ -497,9 +503,9 @@ static int adau7118_parset_dt(const struct adau7118_data *st)
 		return 0;
 
 	ret = device_property_read_u32(st->dev, "adi,decimation-ratio",
-				       &dec_ratio);
+				       &val32);
 	if (!ret) {
-		switch (dec_ratio) {
+		switch (val32) {
 		case 64:
 			regval = ADAU7118_DEC_RATIO(0);
 			break;
@@ -510,7 +516,7 @@ static int adau7118_parset_dt(const struct adau7118_data *st)
 			regval = ADAU7118_DEC_RATIO(2);
 			break;
 		default:
-			dev_err(st->dev, "Invalid dec ratio: %u", dec_ratio);
+			dev_err(st->dev, "Invalid dec ratio: %u", val32);
 			return -EINVAL;
 		}
 
@@ -537,6 +543,54 @@ static int adau7118_parset_dt(const struct adau7118_data *st)
 			return ret;
 	}
 
+	ret = device_property_read_u32(st->dev, "adi,pdm-clk0-ds",
+					&val32);
+	if (!ret) {
+		if (val32 > 3) {
+			dev_err(st->dev, "Invalid pdm-clk0-ds: %u", val32);
+			return -EINVAL;
+		}
+
+		ret = regmap_update_bits(st->map,
+					ADAU7118_REG_DRIVE_STRENGTH,
+					ADAU7118_DS_PDM_CLK0_MASK,
+					ADAU7118_DS_PDM_CLK0(val32));
+		if (ret)
+			return ret;
+	}
+
+	ret = device_property_read_u32(st->dev, "adi,pdm-clk1-ds",
+					&val32);
+	if (!ret) {
+		if (val32 > 3) {
+			dev_err(st->dev, "Invalid pdm-clk1-ds: %u", val32);
+			return -EINVAL;
+		}
+
+		ret = regmap_update_bits(st->map,
+					ADAU7118_REG_DRIVE_STRENGTH,
+					ADAU7118_DS_PDM_CLK1_MASK,
+					ADAU7118_DS_PDM_CLK1(val32));
+		if (ret)
+			return ret;
+	}
+
+	ret = device_property_read_u32(st->dev, "adi,sdata-ds",
+					&val32);
+	if (!ret) {
+		if (val32 > 3) {
+			dev_err(st->dev, "Invalid sdata-ds: %u", val32);
+			return -EINVAL;
+		}
+
+		ret = regmap_update_bits(st->map,
+					ADAU7118_REG_DRIVE_STRENGTH,
+					ADAU7118_DS_SDATA_MASK,
+					ADAU7118_DS_SDATA(val32));
+		if (ret)
+			return ret;
+	}
+
 	return 0;
 }
 
