Show patches with: Submitter = Andrew Thoelke       |   37 patches
Patch Series S/W/F Date Submitter Delegate State
Re-design bakery lock allocation and algorithm --- 2015-09-11 Andrew Thoelke Accepted
Re-design bakery lock memory allocation and algorithm --- 2015-09-07 Andrew Thoelke Accepted
Fix integer extension in mpidr_set_aff_inst() --- 2015-06-19 Andrew Thoelke Accepted
Fix incorrect assertions in bl1_main() --- 2015-06-19 Andrew Thoelke Accepted
Support later revisions of the Foundation FVP --- 2014-06-27 Andrew Thoelke Accepted
Inline the mmio accessor functions --- 2014-06-25 Andrew Thoelke Accepted
Remove current CPU mpidr from PSCI common code --- 2014-06-25 Andrew Thoelke Accepted
Remove calling CPU mpidr from bakery lock API --- 2014-06-23 Andrew Thoelke Accepted
PSCI memory optimizations (v2) --- 2014-06-23 Andrew Thoelke Accepted
Initialise CPU contexts from entry_point_info (v2) --- 2014-06-23 Andrew Thoelke Accepted
Remove NSRAM from FVP memory map --- 2014-06-20 Andrew Thoelke Accepted
Remove broken assertion in console_putc() --- 2014-06-20 Andrew Thoelke Accepted
PSCI memory optimizations --- 2014-06-20 Andrew Thoelke Accepted
PSCI SMC handler improvements --- 2014-06-20 Andrew Thoelke Accepted
Initialize CPU contexts from entry_point_info --- 2014-06-17 Andrew Thoelke Accepted
Move CPU context pointers into cpu_data --- 2014-06-17 Andrew Thoelke Accepted
Remove early_exceptions from BL3-1 --- 2014-06-17 Andrew Thoelke Accepted
Per-cpu data cache restructuring --- 2014-06-17 Andrew Thoelke Accepted
Make the BL3-1 crash reporting optional --- 2014-06-11 Andrew Thoelke Accepted
Provide cm_get/set_context() for current CPU --- 2014-06-11 Andrew Thoelke Accepted
Make system register functions inline assembly v2 --- 2014-06-10 Andrew Thoelke Accepted
Make system register functions inline assembly --- 2014-06-06 Andrew Thoelke Accepted
Set SCR_EL3.RW correctly before exiting bl31_main --- 2014-05-19 Andrew Thoelke Accepted
Fixes for TZC configuration on FVP --- 2014-05-12 Andrew Thoelke Accepted
Set processor endianness immediately after RESET v2 --- 2014-05-07 Andrew Thoelke Accepted
Use MRS/MSR instructions in assembler code v2 --- 2014-05-07 Andrew Thoelke Accepted
Replace disable_mmu with assembler version v2 --- 2014-05-07 Andrew Thoelke Accepted
Correct usage of data and instruction barriers v2 --- 2014-05-07 Andrew Thoelke Accepted
Optimise data cache clean/invalidate operation v2 --- 2014-05-07 Andrew Thoelke Accepted
Optimise data cache clean/invalidate operation --- 2014-05-02 Andrew Thoelke Accepted
Replace disable_mmu with assembler version --- 2014-05-02 Andrew Thoelke Accepted
Use MRS/MSR instructions in assembler code --- 2014-05-02 Andrew Thoelke Accepted
Correct usage of data and instruction barriers --- 2014-05-02 Andrew Thoelke Accepted
Set processor endianness immediately after RESET --- 2014-05-02 Andrew Thoelke Accepted
Allocate single stacks for BL1 and BL2 (v2) --- 2014-04-15 Andrew Thoelke Accepted
Allocate single stacks for BL1 and BL2 --- 2014-04-07 Andrew Thoelke Accepted
Using GCC --gc-sections to eliminate unused code and data --- 2014-04-07 Andrew Thoelke Accepted