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DB6PR0802MB2151; 6:YJbjFB1P3srW/oN9YExUhuR2fo69eF2S0Diu9TyeZBFlh4ekSCHoB5orbRqlfVKs8NuNQXjcmLTd6R2xJoejuBsGX1TYDRwJBo0wpD3np0+lDXQhjWf4sAXUdROZghkmbzuZMB3z4ybl4lB6AiVXBJLuS/T8OtEk2SzI+1F2m/X3XEeYpbYrEf+Ont+Q0V9+E/T+287EdHIohUNuaOL9nc2CWhXup8A12Rh44IWCbgV72d8bq8XiNwLVjlbxrQR7O/StAbRnA/HXnFwux3WNskBrbLd5KRbz/VzESxmvd5U4tI8Dl2wgWkcQxOLwcYfxV2Cj7slymE7OfvpSTQtHCf/hnecONBfnmdC9HZvWknY=; 5:WLRHvoHUOqyeMBmWHjw2O0etB9TpAW0q/24Jkn9qfD3ZsNcA2sfs58OLn6dVBzAtpmNFXBTCJUGtGpdWHIUxN44Dote2BLJHdGGCX+3H8T3PPcHnB8c4tXecBCk0kES+fxOpjuuktDVZ+WUh5mUNwg==; 24:PSgxiW/218HVSH/Pnmhe2y7c9gw9gU+MOPa5QGO9GasvWcisWWqkAz1bo7hhEhBYsj+36nFjPMocUMCqwDbAFhCqdN21/jS8YOkNXCUpzwo= SpamDiagnosticOutput: 1:99 SpamDiagnosticMetadata: NSPM X-Microsoft-Exchange-Diagnostics: 1; DB6PR0802MB2151; 7:TVNddjm37506o+7tZxSsmygjyC4h0X9AYDbJVSNV2BJ/qETy3EWeVd4TWayjGcYGCAU9+LSePuRYYGe047fRImTOQSF/LvyqSZth2AoFodoFAnIH5cmkoECukpROqhfEK5Mh9UOzMFvqSLJwpUoCrVrrCIcO/d0QWMskfnTDEzsdflLD+D5DMiDGZyQ0iRvi9o47PkU/PNFzdKwIbc/XdF2qMjy/PqMMgon+OWPpA2gOd44h4xQYMdZrDKW1xHRe3fD1O+jTkD+MnFVW1jxQ6GeDGMRtvsDgh1fekjE6XMq8SOqqSQtS5TnFuRF1E/QIGd269FqysP3ZYOy6tkWjWCt9TmVKYquTnkuZzOHH+ak= X-OriginatorOrg: arm.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 07 Nov 2016 12:26:54.8640 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-Transport-CrossTenantHeadersStamped: DB6PR0802MB2151 X-IsSubscribed: yes This patch adds support for a subset of the ARMv8.3 pointer authentication instructions: XPACLRI, PACIA1716, PACIB1716, AUTIA1716, AUTIA1716, PACIAZ, PACIASP, PACIBZ, PACISP, AUTIAZ, AUTIASP, AUTIBZ, AUTIBSP. These are aliases to HINT #0x7, HINT #0x8, HINT #0xa, HINT #0xc, HINT #0xe, HINT #0x18, HINT #0x19, ..., HINT #0x1f respectively. For more details about pointer authentication in ARMv8.3 see https://community.arm.com/groups/processors/blog/2016/10/27/armv8-a-architecture-2016-additions (generated files are not in the diff.) opcodes/ 2016-11-07 Szabolcs Nagy * aarch64-tbl.h (aarch64_feature_v8_3, ARMV8_3, V8_3_INSN): New. (arch64_opcode_table): Add xpaclri, pacia1716, pacib1716, autia1716, autib1716, paciaz, paciasp, pacibz, pacibsp, autiaz, autiasp, autibz, autibsp. * aarch64-asm-2.c: Regenerate. * aarch64-dis-2.c: Regenerate. gas/testsuite/ 2016-11-07 Szabolcs Nagy * gas/aarch64/system-3.s: New. * gas/aarch64/system-3.d: New. * gas/aarch64/system.d: Update expected output. diff --git a/gas/testsuite/gas/aarch64/system-3.d b/gas/testsuite/gas/aarch64/system-3.d new file mode 100644 index 0000000..f1db369 --- /dev/null +++ b/gas/testsuite/gas/aarch64/system-3.d @@ -0,0 +1,34 @@ +#as: -march=armv8.3-a +#objdump: -dr + +.*: file format .* + +Disassembly of section \.text: + +0000000000000000 <.*>: + 0: d50320ff xpaclri + 4: d50320ff xpaclri + 8: d503211f pacia1716 + c: d503211f pacia1716 + 10: d503215f pacib1716 + 14: d503215f pacib1716 + 18: d503219f autia1716 + 1c: d503219f autia1716 + 20: d50321df autib1716 + 24: d50321df autib1716 + 28: d503231f paciaz + 2c: d503231f paciaz + 30: d503233f paciasp + 34: d503233f paciasp + 38: d503235f pacibz + 3c: d503235f pacibz + 40: d503237f pacibsp + 44: d503237f pacibsp + 48: d503239f autiaz + 4c: d503239f autiaz + 50: d50323bf autiasp + 54: d50323bf autiasp + 58: d50323df autibz + 5c: d50323df autibz + 60: d50323ff autibsp + 64: d50323ff autibsp diff --git a/gas/testsuite/gas/aarch64/system-3.s b/gas/testsuite/gas/aarch64/system-3.s new file mode 100644 index 0000000..c68b4a8 --- /dev/null +++ b/gas/testsuite/gas/aarch64/system-3.s @@ -0,0 +1,41 @@ + /* ARMv8.3 Pointer authentication, HINT alias instructions. */ + .text + + xpaclri + hint #0x7 + + pacia1716 + hint #0x8 + + pacib1716 + hint #0xa + + autia1716 + hint #0xc + + autib1716 + hint #0xe + + paciaz + hint #0x18 + + paciasp + hint #0x19 + + pacibz + hint #0x1a + + pacibsp + hint #0x1b + + autiaz + hint #0x1c + + autiasp + hint #0x1d + + autibz + hint #0x1e + + autibsp + hint #0x1f diff --git a/gas/testsuite/gas/aarch64/system.d b/gas/testsuite/gas/aarch64/system.d index 2cfcdb5..1103360 100644 --- a/gas/testsuite/gas/aarch64/system.d +++ b/gas/testsuite/gas/aarch64/system.d @@ -19,14 +19,14 @@ Disassembly of section \.text: 2c: d503209f sev 30: d50320bf sevl 34: d50320df hint #0x6 - 38: d50320ff hint #0x7 - 3c: d503211f hint #0x8 + 38: d50320ff (hint #0x7|xpaclri) + 3c: d503211f (hint #0x8|pacia1716) 40: d503213f hint #0x9 - 44: d503215f hint #0xa + 44: d503215f (hint #0xa|pacib1716) 48: d503217f hint #0xb - 4c: d503219f hint #0xc + 4c: d503219f (hint #0xc|autia1716) 50: d50321bf hint #0xd - 54: d50321df hint #0xe + 54: d50321df (hint #0xe|autib1716) 58: d50321ff hint #0xf 5c: d503221f (hint #0x10|esb) 60: d503223f (hint #0x11|psb csync) @@ -36,14 +36,14 @@ Disassembly of section \.text: 70: d50322bf hint #0x15 74: d50322df hint #0x16 78: d50322ff hint #0x17 - 7c: d503231f hint #0x18 - 80: d503233f hint #0x19 - 84: d503235f hint #0x1a - 88: d503237f hint #0x1b - 8c: d503239f hint #0x1c - 90: d50323bf hint #0x1d - 94: d50323df hint #0x1e - 98: d50323ff hint #0x1f + 7c: d503231f (hint #0x18|paciaz) + 80: d503233f (hint #0x19|paciasp) + 84: d503235f (hint #0x1a|pacibz) + 88: d503237f (hint #0x1b|pacibsp) + 8c: d503239f (hint #0x1c|autiaz) + 90: d50323bf (hint #0x1d|autiasp) + 94: d50323df (hint #0x1e|autibz) + 98: d50323ff (hint #0x1f|autibsp) 9c: d503241f hint #0x20 a0: d503243f hint #0x21 a4: d503245f hint #0x22 diff --git a/opcodes/aarch64-tbl.h b/opcodes/aarch64-tbl.h index 81f86c6..02b0a1a 100644 --- a/opcodes/aarch64-tbl.h +++ b/opcodes/aarch64-tbl.h @@ -1904,6 +1904,8 @@ static const aarch64_feature_set aarch64_feature_stat_profile = AARCH64_FEATURE (AARCH64_FEATURE_PROFILE, 0); static const aarch64_feature_set aarch64_feature_sve = AARCH64_FEATURE (AARCH64_FEATURE_SVE, 0); +static const aarch64_feature_set aarch64_feature_v8_3 = + AARCH64_FEATURE (AARCH64_FEATURE_V8_3, 0); #define CORE &aarch64_feature_v8 #define FP &aarch64_feature_fp @@ -1919,6 +1921,7 @@ static const aarch64_feature_set aarch64_feature_sve = #define STAT_PROFILE &aarch64_feature_stat_profile #define ARMV8_2 &aarch64_feature_v8_2 #define SVE &aarch64_feature_sve +#define ARMV8_3 &aarch64_feature_v8_3 #define CORE_INSN(NAME,OPCODE,MASK,CLASS,OP,OPS,QUALS,FLAGS) \ { NAME, OPCODE, MASK, CLASS, OP, CORE, OPS, QUALS, FLAGS, 0, NULL } @@ -1945,6 +1948,8 @@ static const aarch64_feature_set aarch64_feature_sve = #define _SVE_INSN(NAME,OPCODE,MASK,CLASS,OP,OPS,QUALS,FLAGS,TIED) \ { NAME, OPCODE, MASK, CLASS, OP, SVE, OPS, QUALS, \ FLAGS | F_STRICT, TIED, NULL } +#define V8_3_INSN(NAME,OPCODE,MASK,CLASS,OPS,QUALS,FLAGS) \ + { NAME, OPCODE, MASK, CLASS, 0, ARMV8_3, OPS, QUALS, FLAGS, 0, NULL } struct aarch64_opcode aarch64_opcode_table[] = { @@ -3144,6 +3149,11 @@ struct aarch64_opcode aarch64_opcode_table[] = CORE_INSN ("wfi", 0xd503207f, 0xffffffff, ic_system, 0, OP0 (), {}, F_ALIAS), CORE_INSN ("sev", 0xd503209f, 0xffffffff, ic_system, 0, OP0 (), {}, F_ALIAS), CORE_INSN ("sevl",0xd50320bf, 0xffffffff, ic_system, 0, OP0 (), {}, F_ALIAS), + V8_3_INSN ("xpaclri", 0xd50320ff, 0xffffffff, ic_system, OP0 (), {}, F_ALIAS), + V8_3_INSN ("pacia1716", 0xd503211f, 0xffffffff, ic_system, OP0 (), {}, F_ALIAS), + V8_3_INSN ("pacib1716", 0xd503215f, 0xffffffff, ic_system, OP0 (), {}, F_ALIAS), + V8_3_INSN ("autia1716", 0xd503219f, 0xffffffff, ic_system, OP0 (), {}, F_ALIAS), + V8_3_INSN ("autib1716", 0xd50321df, 0xffffffff, ic_system, OP0 (), {}, F_ALIAS), {"esb", 0xd503221f, 0xffffffff, ic_system, 0, RAS, OP0 (), {}, F_ALIAS, 0, NULL}, {"psb", 0xd503223f, 0xffffffff, ic_system, 0, STAT_PROFILE, OP1 (BARRIER_PSB), {}, F_ALIAS, 0, NULL}, CORE_INSN ("clrex", 0xd503305f, 0xfffff0ff, ic_system, 0, OP1 (UIMM4), {}, F_OPD0_OPT | F_DEFAULT (0xF)), @@ -3158,6 +3168,14 @@ struct aarch64_opcode aarch64_opcode_table[] = CORE_INSN ("msr", 0xd5000000, 0xffe00000, ic_system, 0, OP2 (SYSREG, Rt), QL_SRC_X, 0), CORE_INSN ("sysl",0xd5280000, 0xfff80000, ic_system, 0, OP5 (Rt, UIMM3_OP1, Cn, Cm, UIMM3_OP2), QL_SYSL, 0), CORE_INSN ("mrs", 0xd5200000, 0xffe00000, ic_system, 0, OP2 (Rt, SYSREG), QL_DST_X, 0), + V8_3_INSN ("paciaz", 0xd503231f, 0xffffffff, ic_system, OP0 (), {}, F_ALIAS), + V8_3_INSN ("paciasp", 0xd503233f, 0xffffffff, ic_system, OP0 (), {}, F_ALIAS), + V8_3_INSN ("pacibz", 0xd503235f, 0xffffffff, ic_system, OP0 (), {}, F_ALIAS), + V8_3_INSN ("pacibsp", 0xd503237f, 0xffffffff, ic_system, OP0 (), {}, F_ALIAS), + V8_3_INSN ("autiaz", 0xd503239f, 0xffffffff, ic_system, OP0 (), {}, F_ALIAS), + V8_3_INSN ("autiasp", 0xd50323bf, 0xffffffff, ic_system, OP0 (), {}, F_ALIAS), + V8_3_INSN ("autibz", 0xd50323df, 0xffffffff, ic_system, OP0 (), {}, F_ALIAS), + V8_3_INSN ("autibsp", 0xd50323ff, 0xffffffff, ic_system, OP0 (), {}, F_ALIAS), /* Test & branch (immediate). */ CORE_INSN ("tbz", 0x36000000, 0x7f000000, testbranch, 0, OP3 (Rt, BIT_NUM, ADDR_PCREL14), QL_PCREL_14, 0), CORE_INSN ("tbnz",0x37000000, 0x7f000000, testbranch, 0, OP3 (Rt, BIT_NUM, ADDR_PCREL14), QL_PCREL_14, 0),