From patchwork Mon Mar 14 14:25:54 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Shawn Guo X-Patchwork-Id: 558 Return-Path: Delivered-To: unknown Received: from imap.gmail.com (74.125.159.109) by localhost6.localdomain6 with IMAP4-SSL; 08 Jun 2011 14:43:42 -0000 Delivered-To: patches@linaro.org Received: by 10.224.45.75 with SMTP id d11cs61887qaf; Mon, 14 Mar 2011 09:42:04 -0700 (PDT) Received: by 10.204.154.88 with SMTP id n24mr4067503bkw.38.1300120907305; Mon, 14 Mar 2011 09:41:47 -0700 (PDT) Received: from pig2.dooz.org (pig2.dooz.org [88.191.118.219]) by mx.google.com with ESMTPS id 6si8667036fax.26.2011.03.14.09.41.46 (version=TLSv1/SSLv3 cipher=OTHER); Mon, 14 Mar 2011 09:41:47 -0700 (PDT) Received-SPF: neutral (google.com: 88.191.118.219 is neither permitted nor denied by domain of lool@dooz.org) client-ip=88.191.118.219; Authentication-Results: mx.google.com; spf=neutral (google.com: 88.191.118.219 is neither permitted nor denied by domain of lool@dooz.org) smtp.mail=lool@dooz.org Received: from bee.dooz.org (serris.dooz.org [88.166.229.232]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client CN "bee.dooz.org", Issuer "CA Cert Signing Authority" (verified OK)) by pig2.dooz.org (Postfix) with ESMTPS id 13CCEC0042 for ; Mon, 14 Mar 2011 16:41:50 +0000 (UTC) Received: by bee.dooz.org (Postfix, from userid 1000) id B647EE5FB; Mon, 14 Mar 2011 17:41:42 +0100 (CET) Resent-From: =?iso-8859-1?Q?Lo=EFc?= Minier Resent-Date: Mon, 14 Mar 2011 17:41:42 +0100 Resent-Message-ID: <20110314164142.GG18358@bee.dooz.org> Resent-To: patches@linaro.org X-Original-To: lool@dooz.org Received: from mombin.canonical.com (mombin.canonical.com [91.189.95.16]) by pig.zood.org (Postfix) with ESMTP id 24AA54C0D7 for ; Mon, 14 Mar 2011 15:23:42 +0100 (CET) Received: from localhost ([127.0.0.1] helo=mombin.canonical.com) by mombin.canonical.com with esmtp (Exim 4.71) (envelope-from ) id 1Pz8gN-0004jJ-FV; Mon, 14 Mar 2011 14:23:39 +0000 Received: from mail-pz0-f42.google.com ([209.85.210.42]) by mombin.canonical.com with esmtp (Exim 4.71) (envelope-from ) id 1Pz8gM-0004i4-Hm for linaro-dev@lists.linaro.org; Mon, 14 Mar 2011 14:23:38 +0000 Received: by mail-pz0-f42.google.com with SMTP id 4so916563pzk.1 for ; Mon, 14 Mar 2011 07:23:38 -0700 (PDT) Received: by 10.142.128.17 with SMTP id a17mr10455526wfd.110.1300112618046; Mon, 14 Mar 2011 07:23:38 -0700 (PDT) Received: from localhost.localdomain ([114.216.146.145]) by mx.google.com with ESMTPS id x11sm3671251wfd.1.2011.03.14.07.23.29 (version=TLSv1/SSLv3 cipher=OTHER); Mon, 14 Mar 2011 07:23:37 -0700 (PDT) From: Shawn Guo To: devicetree-discuss@lists.ozlabs.org, linaro-dev@lists.linaro.org Subject: [PATCH 2/7] arm/dt: add pad configurations for mx51 babbage Date: Mon, 14 Mar 2011 22:25:54 +0800 Message-Id: <1300112759-3495-3-git-send-email-shawn.guo@linaro.org> X-Mailer: git-send-email 1.7.1 In-Reply-To: <1300112759-3495-1-git-send-email-shawn.guo@linaro.org> References: <1300112759-3495-1-git-send-email-shawn.guo@linaro.org> Cc: nicolas.pitre@linaro.org X-BeenThere: linaro-dev@lists.linaro.org X-Mailman-Version: 2.1.13 Precedence: list List-Id: Linaro Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: linaro-dev-bounces@lists.linaro.org Errors-To: linaro-dev-bounces@lists.linaro.org The pad configuration is something common between dt and non-dt kernel, so it can be copied from non-dt code directly. Signed-off-by: Shawn Guo --- arch/arm/mach-mx5/board-dt.c | 94 ++++++++++++++++++++++++++++++++++++++++++ 1 files changed, 94 insertions(+), 0 deletions(-) diff --git a/arch/arm/mach-mx5/board-dt.c b/arch/arm/mach-mx5/board-dt.c index 45d1e37..4850251 100644 --- a/arch/arm/mach-mx5/board-dt.c +++ b/arch/arm/mach-mx5/board-dt.c @@ -31,6 +31,97 @@ #include "devices.h" +static iomux_v3_cfg_t mx51babbage_pads[] = { + /* UART1 */ + MX51_PAD_UART1_RXD__UART1_RXD, + MX51_PAD_UART1_TXD__UART1_TXD, + MX51_PAD_UART1_RTS__UART1_RTS, + MX51_PAD_UART1_CTS__UART1_CTS, + + /* UART2 */ + MX51_PAD_UART2_RXD__UART2_RXD, + MX51_PAD_UART2_TXD__UART2_TXD, + + /* UART3 */ + MX51_PAD_EIM_D25__UART3_RXD, + MX51_PAD_EIM_D26__UART3_TXD, + MX51_PAD_EIM_D27__UART3_RTS, + MX51_PAD_EIM_D24__UART3_CTS, + + /* I2C1 */ + MX51_PAD_EIM_D16__I2C1_SDA, + MX51_PAD_EIM_D19__I2C1_SCL, + + /* I2C2 */ + MX51_PAD_KEY_COL4__I2C2_SCL, + MX51_PAD_KEY_COL5__I2C2_SDA, + + /* HSI2C */ + MX51_PAD_I2C1_CLK__I2C1_CLK, + MX51_PAD_I2C1_DAT__I2C1_DAT, + + /* USB HOST1 */ + MX51_PAD_USBH1_CLK__USBH1_CLK, + MX51_PAD_USBH1_DIR__USBH1_DIR, + MX51_PAD_USBH1_NXT__USBH1_NXT, + MX51_PAD_USBH1_DATA0__USBH1_DATA0, + MX51_PAD_USBH1_DATA1__USBH1_DATA1, + MX51_PAD_USBH1_DATA2__USBH1_DATA2, + MX51_PAD_USBH1_DATA3__USBH1_DATA3, + MX51_PAD_USBH1_DATA4__USBH1_DATA4, + MX51_PAD_USBH1_DATA5__USBH1_DATA5, + MX51_PAD_USBH1_DATA6__USBH1_DATA6, + MX51_PAD_USBH1_DATA7__USBH1_DATA7, + + /* USB HUB reset line*/ + MX51_PAD_GPIO1_7__GPIO1_7, + + /* FEC */ + MX51_PAD_EIM_EB2__FEC_MDIO, + MX51_PAD_EIM_EB3__FEC_RDATA1, + MX51_PAD_EIM_CS2__FEC_RDATA2, + MX51_PAD_EIM_CS3__FEC_RDATA3, + MX51_PAD_EIM_CS4__FEC_RX_ER, + MX51_PAD_EIM_CS5__FEC_CRS, + MX51_PAD_NANDF_RB2__FEC_COL, + MX51_PAD_NANDF_RB3__FEC_RX_CLK, + MX51_PAD_NANDF_D9__FEC_RDATA0, + MX51_PAD_NANDF_D8__FEC_TDATA0, + MX51_PAD_NANDF_CS2__FEC_TX_ER, + MX51_PAD_NANDF_CS3__FEC_MDC, + MX51_PAD_NANDF_CS4__FEC_TDATA1, + MX51_PAD_NANDF_CS5__FEC_TDATA2, + MX51_PAD_NANDF_CS6__FEC_TDATA3, + MX51_PAD_NANDF_CS7__FEC_TX_EN, + MX51_PAD_NANDF_RDY_INT__FEC_TX_CLK, + + /* FEC PHY reset line */ + MX51_PAD_EIM_A20__GPIO2_14, + + /* SD 1 */ + MX51_PAD_SD1_CMD__SD1_CMD, + MX51_PAD_SD1_CLK__SD1_CLK, + MX51_PAD_SD1_DATA0__SD1_DATA0, + MX51_PAD_SD1_DATA1__SD1_DATA1, + MX51_PAD_SD1_DATA2__SD1_DATA2, + MX51_PAD_SD1_DATA3__SD1_DATA3, + + /* SD 2 */ + MX51_PAD_SD2_CMD__SD2_CMD, + MX51_PAD_SD2_CLK__SD2_CLK, + MX51_PAD_SD2_DATA0__SD2_DATA0, + MX51_PAD_SD2_DATA1__SD2_DATA1, + MX51_PAD_SD2_DATA2__SD2_DATA2, + MX51_PAD_SD2_DATA3__SD2_DATA3, + + /* eCSPI1 */ + MX51_PAD_CSPI1_MISO__ECSPI1_MISO, + MX51_PAD_CSPI1_MOSI__ECSPI1_MOSI, + MX51_PAD_CSPI1_SCLK__ECSPI1_SCLK, + MX51_PAD_CSPI1_SS0__GPIO4_24, + MX51_PAD_CSPI1_SS1__GPIO4_25, +}; + static struct of_device_id mx51_dt_match_table[] __initdata = { { .compatible = "simple-bus", }, {} @@ -39,6 +130,9 @@ static struct of_device_id mx51_dt_match_table[] __initdata = { static void __init mx51_dt_board_init(void) { of_platform_bus_probe(NULL, mx51_dt_match_table, NULL); + + mxc_iomux_v3_setup_multiple_pads(mx51babbage_pads, + ARRAY_SIZE(mx51babbage_pads)); } static void __init mx51_dt_timer_init(void)