diff mbox series

[v4,2/2] net/ixgbe: calculate correct number of received packets for ARM NEON-version vPMD

Message ID 1486613126-30409-2-git-send-email-jianbo.liu@linaro.org
State New
Headers show
Series [v4,1/2] net/ixgbe: calculate the correct number of received packets in bulk alloc function | expand

Commit Message

Jianbo Liu Feb. 9, 2017, 4:05 a.m. UTC 
vPMD will check 4 descs in one time, but the statuses are not consistent
because the memory allocated for RX descriptors is cacheable huagepage.
This patch is to calculate the number of received packets by scann DD bit
sequentially, and stops when meeting the first packet with DD bit unset.

Signed-off-by: Jianbo Liu <jianbo.liu@linaro.org>

---
 drivers/net/ixgbe/ixgbe_rxtx_vec_neon.c | 29 +++++++++++++++++------------
 1 file changed, 17 insertions(+), 12 deletions(-)

-- 
1.8.3.1

Comments

Ferruh Yigit Feb. 9, 2017, 12:43 p.m. UTC | #1 
On 2/9/2017 4:05 AM, Jianbo Liu wrote:
> vPMD will check 4 descs in one time, but the statuses are not consistent

> because the memory allocated for RX descriptors is cacheable huagepage.

> This patch is to calculate the number of received packets by scann DD bit

> sequentially, and stops when meeting the first packet with DD bit unset.

> 

> Signed-off-by: Jianbo Liu <jianbo.liu@linaro.org>


    net/ixgbe: fix received packets number for ARM NEON

    Fixes: b20971b6cca0 ("net/ixgbe: implement vector driver for ARM")
    Cc: stable@dpdk.org

Applied to dpdk-next-net/master, thanks.
diff mbox series

Patch

diff --git a/drivers/net/ixgbe/ixgbe_rxtx_vec_neon.c b/drivers/net/ixgbe/ixgbe_rxtx_vec_neon.c
index f96cc85..e2715cb 100644
--- a/drivers/net/ixgbe/ixgbe_rxtx_vec_neon.c
+++ b/drivers/net/ixgbe/ixgbe_rxtx_vec_neon.c
@@ -196,7 +196,6 @@ 
 	struct ixgbe_rx_entry *sw_ring;
 	uint16_t nb_pkts_recd;
 	int pos;
-	uint64_t var;
 	uint8x16_t shuf_msk = {
 		0xFF, 0xFF,
 		0xFF, 0xFF,  /* skip 32 bits pkt_type */
@@ -255,26 +254,24 @@ 
 		uint64x2_t mbp1, mbp2;
 		uint8x16_t staterr;
 		uint16x8_t tmp;
+		uint32_t var = 0;
 		uint32_t stat;
 
 		/* B.1 load 1 mbuf point */
 		mbp1 = vld1q_u64((uint64_t *)&sw_ring[pos]);
 
-		/* Read desc statuses backwards to avoid race condition */
-		/* A.1 load 4 pkts desc */
-		descs[3] =  vld1q_u64((uint64_t *)(rxdp + 3));
-		rte_rmb();
-
 		/* B.2 copy 2 mbuf point into rx_pkts  */
 		vst1q_u64((uint64_t *)&rx_pkts[pos], mbp1);
 
 		/* B.1 load 1 mbuf point */
 		mbp2 = vld1q_u64((uint64_t *)&sw_ring[pos + 2]);
 
-		descs[2] =  vld1q_u64((uint64_t *)(rxdp + 2));
-		/* B.1 load 2 mbuf point */
-		descs[1] =  vld1q_u64((uint64_t *)(rxdp + 1));
+		/* A. load 4 pkts descs */
 		descs[0] =  vld1q_u64((uint64_t *)(rxdp));
+		descs[1] =  vld1q_u64((uint64_t *)(rxdp + 1));
+		descs[2] =  vld1q_u64((uint64_t *)(rxdp + 2));
+		descs[3] =  vld1q_u64((uint64_t *)(rxdp + 3));
+		rte_smp_rmb();
 
 		/* B.2 copy 2 mbuf point into rx_pkts  */
 		vst1q_u64((uint64_t *)&rx_pkts[pos + 2], mbp2);
@@ -349,11 +346,19 @@ 
 		vst1q_u8((uint8_t *)&rx_pkts[pos]->rx_descriptor_fields1,
 			 pkt_mb1);
 
+		stat &= IXGBE_VPMD_DESC_DD_MASK;
+
 		/* C.4 calc avaialbe number of desc */
-		var =  __builtin_popcount(stat & IXGBE_VPMD_DESC_DD_MASK);
-		nb_pkts_recd += var;
-		if (likely(var != RTE_IXGBE_DESCS_PER_LOOP))
+		if (likely(stat != IXGBE_VPMD_DESC_DD_MASK)) {
+			while (stat & 0x01) {
+				++var;
+				stat = stat >> 8;
+			}
+			nb_pkts_recd += var;
 			break;
+		} else {
+			nb_pkts_recd += RTE_IXGBE_DESCS_PER_LOOP;
+		}
 	}
 
 	/* Update our internal tail pointer */