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HE1PR04MB1529; 6:skBQw56ce0TLDtf+ayAUG2KtlbJUVsY/VIF4EXwQkx7L0nuAxM2hEqf6JoVv2OTK/3VKgSAvAYEhoO27ULAUbMN/QZZYVnYiis4uhiZFwjv/axi+d9uNh6vv/iDxqPCei27JUP6jHWQZunlVVXg3ekv/sLq6y+44DFKb0vlP7nohYj4qo4VuGzgaZ70bGWQRpM+k3vOQJaXv/qnwagi6LPmXEJ4NnWM7IxqtZAsLcJNqPY5YXOb95FkKvy6Xf4S3CXQn4w4IdQjPGAz0p5WTE6E12rougTKEcVuxcCi0S5M5u0MnEVs3bAaO1DhNB9GNVI6c5m8j9B63RN8dqdeLD2j+ZtOxHRH9L51mVt8GsNAiN8YTF6wJtsAg5s+9ZjCnd841hBOUyFN1uFLpfEAdDoSPpb52huOFmzpvyYTzLls0AfjyaIXmgU2NT3QoIWMyqH5mLXEHLoOkELXDChgRgw==; 5:aandzPSbC6ezG3g+nqULuK5UfQuGIF56+SK7Xr9Xb913yRDcvkmiESBP4ENTxK7scwwpPzOdk74HORqbO05MeUvl+uB+yCFn8qrVD91otRhgZL6x0MEmsIcIXevXQN3udy1LfgGUYS6ZXuX6JyhNoKrauyMK9HRTHifgRrPPlxA=; 7:sEIyNMVCEdQT9VT+faqt/kdobGrDFv3CPvSMYPp9A9OPwYK078NUCOlqcYh2NWwimoNESy1Bp7pYtjGgh77UG2AmGz+ootepveFL1/FROisyiZXXF5A1RiTmHMyTvpkc5zlDZ7nNdVrssM5fv79hhD+8a0O4dp9o3lxKQVFvBj+XiPeBaSZYRW/eUK4pj/SYZ5zhg27rGSWyLcFeIt1nnkHcDE3Q5OtMPyJO+CNLeRDo6m8pLXKfLmBYansT4Mhs SpamDiagnosticOutput: 1:99 SpamDiagnosticMetadata: NSPM X-OriginatorOrg: nxp.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 13 Sep 2018 06:09:23.0694 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 72c4968a-9a66-45b2-5c78-08d6193f7415 X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-Transport-CrossTenantHeadersStamped: HE1PR04MB1529 Subject: [dpdk-dev] [PATCH 01/10] doc: add caam jr cryptodev details X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Hemant Agrawal Signed-off-by: Hemant Agrawal --- doc/guides/cryptodevs/caam_jr.rst | 159 ++++++++++++++++++++++++++++++ doc/guides/cryptodevs/index.rst | 1 + 2 files changed, 160 insertions(+) create mode 100644 doc/guides/cryptodevs/caam_jr.rst -- 2.17.1 diff --git a/doc/guides/cryptodevs/caam_jr.rst b/doc/guides/cryptodevs/caam_jr.rst new file mode 100644 index 000000000..0ee501506 --- /dev/null +++ b/doc/guides/cryptodevs/caam_jr.rst @@ -0,0 +1,159 @@ +.. SPDX-License-Identifier: BSD-3-Clause + Copyright 2017 NXP + + +NXP CAAM JOB RING (caam_jr) +=========================== + +The caam_jr PMD provides poll mode crypto driver support for NXP SEC 4.x+ (CAAM) +hardware accelerator. More information is available at: + +`NXP Cryptographic Acceleration Technology `_. + +Architecture +------------ + +SEC is the SOC's security engine, which serves as NXP's latest cryptographic +acceleration and offloading hardware. It combines functions previously +implemented in separate modules to create a modular and scalable acceleration +and assurance engine. It also implements block encryption algorithms, stream +cipher algorithms, hashing algorithms, public key algorithms, run-time +integrity checking, and a hardware random number generator. SEC performs +higher-level cryptographic operations than previous NXP cryptographic +accelerators. This provides significant improvement to system level performance. + +SEC HW accelerator above 4.x+ version are also known as CAAM. + +caam_jr PMD is one of DPAA drivers which uses uio interface to interact with +Linux kernel for configure and destroy the device instance (ring). + + +Implementation +-------------- + +SEC provides platform assurance by working with SecMon, which is a companion +logic block that tracks the security state of the SOC. SEC is programmed by +means of descriptors (not to be confused with frame descriptors (FDs)) that +indicate the operations to be performed and link to the message and +associated data. SEC incorporates two DMA engines to fetch the descriptors, +read the message data, and write the results of the operations. The DMA +engine provides a scatter/gather capability so that SEC can read and write +data scattered in memory. SEC may be configured by means of software for +dynamic changes in byte ordering. The default configuration for this version +of SEC is little-endian mode. + +Note that one physical Job Ring represent one caam_jr device. + +Features +-------- + +The CAAM_JR PMD has support for: + +Cipher algorithms: + +* ``RTE_CRYPTO_CIPHER_3DES_CBC`` +* ``RTE_CRYPTO_CIPHER_AES128_CBC`` +* ``RTE_CRYPTO_CIPHER_AES192_CBC`` +* ``RTE_CRYPTO_CIPHER_AES256_CBC`` +* ``RTE_CRYPTO_CIPHER_AES128_CTR`` +* ``RTE_CRYPTO_CIPHER_AES192_CTR`` +* ``RTE_CRYPTO_CIPHER_AES256_CTR`` + +Hash algorithms: + +* ``RTE_CRYPTO_AUTH_SHA1_HMAC`` +* ``RTE_CRYPTO_AUTH_SHA224_HMAC`` +* ``RTE_CRYPTO_AUTH_SHA256_HMAC`` +* ``RTE_CRYPTO_AUTH_SHA384_HMAC`` +* ``RTE_CRYPTO_AUTH_SHA512_HMAC`` +* ``RTE_CRYPTO_AUTH_MD5_HMAC`` + +AEAD algorithms: + +* ``RTE_CRYPTO_AEAD_AES_GCM`` + +Supported DPAA SoCs +-------------------- + +* LS1046A/LS1026A +* LS1043A/LS1023A +* LS1028A +* LS1012A + +Limitations +----------- + +* Hash followed by Cipher mode is not supported +* Only supports the session-oriented API implementation (session-less APIs are not supported). + +Prerequisites +------------- + +caam_jr driver has following dependencies are not part of DPDK and must be installed separately: + +* **NXP Linux SDK** + + NXP Linux software development kit (SDK) includes support for the family + of QorIQ® ARM-Architecture-based system on chip (SoC) processors + and corresponding boards. + + It includes the Linux board support packages (BSPs) for NXP SoCs, + a fully operational tool chain, kernel and board specific modules. + + SDK and related information can be obtained from: `NXP QorIQ SDK `_. + +Currently supported by DPDK: + +* NXP SDK **18.09+**. +* Supported architectures: **arm64 LE**. + +* Follow the DPDK :ref:`Getting Started Guide for Linux ` to setup the basic DPDK environment. + +Pre-Installation Configuration +------------------------------ + +Config File Options +~~~~~~~~~~~~~~~~~~~ + +The following options can be modified in the ``config`` file +to enable caam_jr PMD. + +Please note that enabling debugging options may affect system performance. + +* ``CONFIG_RTE_LIBRTE_PMD_CAAM_JR`` (default ``n``) + By default it is only enabled in common_armv8a_linuxapp config. + Toggle compilation of the ``librte_pmd_caam_jr`` driver. + +* ``CONFIG_RTE_LIBRTE_PMD_CAAM_JR_BE`` (default ``n``) + By default it is disabled. + It can be used when the underlying hardware supports the CAAM in BE mode. + e.g. LS1043A, LS1046A supports CAAM in BE mode. + +* ``CONFIG_RTE_LIBRTE_PMD_CAAM_JR_DEBUG`` (default ``n``) + By default it is disabled. + It can be used enabled debug mode. + +* ``CONFIG_RTE_CAAM_JR_PMD_MAX_NB_SESSIONS`` + By default it is set as 2048 in common_base config. + It indicates Number of sessions to create in the session memory pool + on a single caam_jr device. + + +Installations +------------- +To compile the caam_jr PMD for Linux arm64 gcc target, run the +following ``make`` command: + +.. code-block:: console + + cd + make config T=arm64-armv8a-linuxapp-gcc install + +Enabling logs +------------- + +For enabling logs, use the following EAL parameter: + +.. code-block:: console + + ./your_crypto_application --log-level=pmd.crypto.caam, diff --git a/doc/guides/cryptodevs/index.rst b/doc/guides/cryptodevs/index.rst index e9928a4e2..7dddeec8a 100644 --- a/doc/guides/cryptodevs/index.rst +++ b/doc/guides/cryptodevs/index.rst @@ -13,6 +13,7 @@ Crypto Device Drivers aesni_mb aesni_gcm armv8 + caam_jr ccp dpaa2_sec dpaa_sec