From patchwork Mon Oct 21 00:22:58 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Honnappa Nagarahalli X-Patchwork-Id: 177010 Delivered-To: patch@linaro.org Received: by 2002:a92:409a:0:0:0:0:0 with SMTP id d26csp2677241ill; Sun, 20 Oct 2019 17:24:17 -0700 (PDT) X-Google-Smtp-Source: APXvYqylvsvIjU3oQWXGwJLDGy7GFLJ8I11+6FsFoOKnOsv/EVfqKkZc/d0VRv2gM77vhoSYoKQv X-Received: by 2002:a05:6402:2028:: with SMTP id ay8mr21926272edb.273.1571617457629; Sun, 20 Oct 2019 17:24:17 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1571617457; cv=none; d=google.com; s=arc-20160816; b=y7HcHzvnP9CNe7+eO7To9/T5fyjgrz+3ofSnD5QBieozOoU1KgTR0yi3RcDMawwBET 2GJ5PsYCkR9Sxo3VkiTUgYc+ORSfOfUEg5hoaDPnav1QzCadN9YO/4dgDP5uWdoI5lm0 MXPYytqvA4O9mWB+CvKvtlmgTQDUet+3LgQmbyxZ0IqOG9uQXIrPcGtJP/cQkeK0tZsM ij9wWtqnDuPu7DQ8gA5P5jzlrMx/H+9BWPFzXEd8fXVafxbzwg6fZYzHDx0UVjSqmQ7W W10fwWVoqX01Fej5bMSIFiP/S0M3BWm0bCms8mvs1YnRBs5WbkP+bKZatMPbBz6NKr3U Qjcw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:subject:references:in-reply-to :message-id:date:cc:to:from; bh=RTkZtSulqlJ66igNX+gbojfwoMfPLd4jf1GAJIlLo8k=; b=ZNnEJUYf9jzl4qnDmlCqzMpUm4eHaP7j9i3/QDIGVC6HmzFHs8X/PDSKlKJM+Re2RU rQqMIqa1SqaQ0K6vHQVwCUL9YC9MfxsvSfsX/a+2oGUjujYTbFe4uP1H/1Np5mgAvG6T jvT2fQEnfmGw5Xtf554h3AXyOgXgKL0lvBM8089kpfMFtNtE/38KJtCenYwi1wHFZB0L p0zJBGANPEL54M45dO7O5pENM/5EVPTV3VjAMh8kbnkZTy/QIg9duuEjUAWIuMXn9FDT KGhHQ3gmXqYxDe4hTwpLC8EVDt+hd22LNvFw7hE9vkrIaljLLdPVTFE3LnvfY/fHdOVn mCLg== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of dev-bounces@dpdk.org designates 92.243.14.124 as permitted sender) smtp.mailfrom=dev-bounces@dpdk.org Return-Path: Received: from dpdk.org (dpdk.org. [92.243.14.124]) by mx.google.com with ESMTP id e6si7492967ejb.348.2019.10.20.17.24.17; Sun, 20 Oct 2019 17:24:17 -0700 (PDT) Received-SPF: pass (google.com: domain of dev-bounces@dpdk.org designates 92.243.14.124 as permitted sender) client-ip=92.243.14.124; Authentication-Results: mx.google.com; spf=pass (google.com: domain of dev-bounces@dpdk.org designates 92.243.14.124 as permitted sender) smtp.mailfrom=dev-bounces@dpdk.org Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 4F0622AA6; Mon, 21 Oct 2019 02:23:49 +0200 (CEST) Received: from foss.arm.com (unknown [217.140.110.172]) by dpdk.org (Postfix) with ESMTP id 7222114EC for ; Mon, 21 Oct 2019 02:23:43 +0200 (CEST) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 418EBE8E; Sun, 20 Oct 2019 17:23:34 -0700 (PDT) Received: from qc2400f-1.austin.arm.com (qc2400f-1.austin.arm.com [10.118.12.34]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 3215C3F71F; Sun, 20 Oct 2019 17:23:34 -0700 (PDT) From: Honnappa Nagarahalli To: olivier.matz@6wind.com, sthemmin@microsoft.com, jerinj@marvell.com, bruce.richardson@intel.com, david.marchand@redhat.com, pbhagavatula@marvell.com, konstantin.ananyev@intel.com, drc@linux.vnet.ibm.com, hemant.agrawal@nxp.com, honnappa.nagarahalli@arm.com Cc: dev@dpdk.org, dharmik.thakkar@arm.com, ruifeng.wang@arm.com, gavin.hu@arm.com Date: Sun, 20 Oct 2019 19:22:58 -0500 Message-Id: <20191021002300.26497-5-honnappa.nagarahalli@arm.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20191021002300.26497-1-honnappa.nagarahalli@arm.com> References: <20190906190510.11146-1-honnappa.nagarahalli@arm.com> <20191021002300.26497-1-honnappa.nagarahalli@arm.com> Subject: [dpdk-dev] [RFC v6 4/6] test/ring: add perf tests for configurable element size ring X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Add performance tests for rte_ring_xxx_elem APIs. At this point these are derived mainly from existing rte_ring_xxx test cases. Signed-off-by: Honnappa Nagarahalli --- app/test/Makefile | 1 + app/test/meson.build | 1 + app/test/test_ring_perf_elem.c | 419 +++++++++++++++++++++++++++++++++ 3 files changed, 421 insertions(+) create mode 100644 app/test/test_ring_perf_elem.c -- 2.17.1 diff --git a/app/test/Makefile b/app/test/Makefile index 483865b4a..6f168881c 100644 --- a/app/test/Makefile +++ b/app/test/Makefile @@ -79,6 +79,7 @@ SRCS-y += test_rand_perf.c SRCS-y += test_ring.c SRCS-y += test_ring_elem.c SRCS-y += test_ring_perf.c +SRCS-y += test_ring_perf_elem.c SRCS-y += test_pmd_perf.c ifeq ($(CONFIG_RTE_LIBRTE_TABLE),y) diff --git a/app/test/meson.build b/app/test/meson.build index 1ca25c00a..634cbbf26 100644 --- a/app/test/meson.build +++ b/app/test/meson.build @@ -102,6 +102,7 @@ test_sources = files('commands.c', 'test_ring.c', 'test_ring_elem.c', 'test_ring_perf.c', + 'test_ring_perf_elem.c', 'test_rwlock.c', 'test_sched.c', 'test_service_cores.c', diff --git a/app/test/test_ring_perf_elem.c b/app/test/test_ring_perf_elem.c new file mode 100644 index 000000000..402b7877a --- /dev/null +++ b/app/test/test_ring_perf_elem.c @@ -0,0 +1,419 @@ +/* SPDX-License-Identifier: BSD-3-Clause + * Copyright(c) 2010-2014 Intel Corporation + */ + + +#include +#include +#include +#include +#include +#include +#include + +#include "test.h" + +/* + * Ring + * ==== + * + * Measures performance of various operations using rdtsc + * * Empty ring dequeue + * * Enqueue/dequeue of bursts in 1 threads + * * Enqueue/dequeue of bursts in 2 threads + */ + +#define RING_NAME "RING_PERF" +#define RING_SIZE 4096 +#define MAX_BURST 64 + +/* + * the sizes to enqueue and dequeue in testing + * (marked volatile so they won't be seen as compile-time constants) + */ +static const volatile unsigned bulk_sizes[] = { 8, 32 }; + +struct lcore_pair { + unsigned c1, c2; +}; + +static volatile unsigned lcore_count; + +/**** Functions to analyse our core mask to get cores for different tests ***/ + +static int +get_two_hyperthreads(struct lcore_pair *lcp) +{ + unsigned id1, id2; + unsigned c1, c2, s1, s2; + RTE_LCORE_FOREACH(id1) { + /* inner loop just re-reads all id's. We could skip the + * first few elements, but since number of cores is small + * there is little point + */ + RTE_LCORE_FOREACH(id2) { + if (id1 == id2) + continue; + + c1 = rte_lcore_to_cpu_id(id1); + c2 = rte_lcore_to_cpu_id(id2); + s1 = rte_lcore_to_socket_id(id1); + s2 = rte_lcore_to_socket_id(id2); + if ((c1 == c2) && (s1 == s2)) { + lcp->c1 = id1; + lcp->c2 = id2; + return 0; + } + } + } + return 1; +} + +static int +get_two_cores(struct lcore_pair *lcp) +{ + unsigned id1, id2; + unsigned c1, c2, s1, s2; + RTE_LCORE_FOREACH(id1) { + RTE_LCORE_FOREACH(id2) { + if (id1 == id2) + continue; + + c1 = rte_lcore_to_cpu_id(id1); + c2 = rte_lcore_to_cpu_id(id2); + s1 = rte_lcore_to_socket_id(id1); + s2 = rte_lcore_to_socket_id(id2); + if ((c1 != c2) && (s1 == s2)) { + lcp->c1 = id1; + lcp->c2 = id2; + return 0; + } + } + } + return 1; +} + +static int +get_two_sockets(struct lcore_pair *lcp) +{ + unsigned id1, id2; + unsigned s1, s2; + RTE_LCORE_FOREACH(id1) { + RTE_LCORE_FOREACH(id2) { + if (id1 == id2) + continue; + s1 = rte_lcore_to_socket_id(id1); + s2 = rte_lcore_to_socket_id(id2); + if (s1 != s2) { + lcp->c1 = id1; + lcp->c2 = id2; + return 0; + } + } + } + return 1; +} + +/* Get cycle counts for dequeuing from an empty ring. Should be 2 or 3 cycles */ +static void +test_empty_dequeue(struct rte_ring *r) +{ + const unsigned iter_shift = 26; + const unsigned iterations = 1<r; + const unsigned size = params->size; + unsigned i; + uint32_t burst[MAX_BURST] = {0}; + +#ifdef RTE_USE_C11_MEM_MODEL + if (__atomic_add_fetch(&lcore_count, 1, __ATOMIC_RELAXED) != 2) +#else + if (__sync_add_and_fetch(&lcore_count, 1) != 2) +#endif + while (lcore_count != 2) + rte_pause(); + + const uint64_t sp_start = rte_rdtsc(); + for (i = 0; i < iterations; i++) + while (rte_ring_sp_enqueue_bulk_elem(r, burst, 8, size, NULL) + == 0) + rte_pause(); + const uint64_t sp_end = rte_rdtsc(); + + const uint64_t mp_start = rte_rdtsc(); + for (i = 0; i < iterations; i++) + while (rte_ring_mp_enqueue_bulk_elem(r, burst, 8, size, NULL) + == 0) + rte_pause(); + const uint64_t mp_end = rte_rdtsc(); + + params->spsc = ((double)(sp_end - sp_start))/(iterations*size); + params->mpmc = ((double)(mp_end - mp_start))/(iterations*size); + return 0; +} + +/* + * Function that uses rdtsc to measure timing for ring dequeue. Needs pair + * thread running enqueue_bulk function + */ +static int +dequeue_bulk(void *p) +{ + const unsigned iter_shift = 23; + const unsigned iterations = 1<r; + const unsigned size = params->size; + unsigned i; + uint32_t burst[MAX_BURST] = {0}; + +#ifdef RTE_USE_C11_MEM_MODEL + if (__atomic_add_fetch(&lcore_count, 1, __ATOMIC_RELAXED) != 2) +#else + if (__sync_add_and_fetch(&lcore_count, 1) != 2) +#endif + while (lcore_count != 2) + rte_pause(); + + const uint64_t sc_start = rte_rdtsc(); + for (i = 0; i < iterations; i++) + while (rte_ring_sc_dequeue_bulk_elem(r, burst, 8, size, NULL) + == 0) + rte_pause(); + const uint64_t sc_end = rte_rdtsc(); + + const uint64_t mc_start = rte_rdtsc(); + for (i = 0; i < iterations; i++) + while (rte_ring_mc_dequeue_bulk_elem(r, burst, 8, size, NULL) + == 0) + rte_pause(); + const uint64_t mc_end = rte_rdtsc(); + + params->spsc = ((double)(sc_end - sc_start))/(iterations*size); + params->mpmc = ((double)(mc_end - mc_start))/(iterations*size); + return 0; +} + +/* + * Function that calls the enqueue and dequeue bulk functions on pairs of cores. + * used to measure ring perf between hyperthreads, cores and sockets. + */ +static void +run_on_core_pair(struct lcore_pair *cores, struct rte_ring *r, + lcore_function_t f1, lcore_function_t f2) +{ + struct thread_params param1 = {0}, param2 = {0}; + unsigned i; + for (i = 0; i < sizeof(bulk_sizes)/sizeof(bulk_sizes[0]); i++) { + lcore_count = 0; + param1.size = param2.size = bulk_sizes[i]; + param1.r = param2.r = r; + if (cores->c1 == rte_get_master_lcore()) { + rte_eal_remote_launch(f2, ¶m2, cores->c2); + f1(¶m1); + rte_eal_wait_lcore(cores->c2); + } else { + rte_eal_remote_launch(f1, ¶m1, cores->c1); + rte_eal_remote_launch(f2, ¶m2, cores->c2); + rte_eal_wait_lcore(cores->c1); + rte_eal_wait_lcore(cores->c2); + } + printf("SP/SC bulk enq/dequeue (size: %u): %.2F\n", + bulk_sizes[i], param1.spsc + param2.spsc); + printf("MP/MC bulk enq/dequeue (size: %u): %.2F\n", + bulk_sizes[i], param1.mpmc + param2.mpmc); + } +} + +/* + * Test function that determines how long an enqueue + dequeue of a single item + * takes on a single lcore. Result is for comparison with the bulk enq+deq. + */ +static void +test_single_enqueue_dequeue(struct rte_ring *r) +{ + const unsigned iter_shift = 24; + const unsigned iterations = 1<