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Mon, 16 Nov 2020 09:37:39 -0800 (PST) Received: from dell.default ([91.110.221.159]) by smtp.gmail.com with ESMTPSA id 30sm16942828wrd.88.2020.11.16.09.37.38 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 16 Nov 2020 09:37:38 -0800 (PST) From: Lee Jones To: lee.jones@linaro.org Subject: [PATCH 25/43] drm/radeon/ni_dma: Move 'cayman_gpu_check_soft_reset()'s prototype to shared header Date: Mon, 16 Nov 2020 17:36:42 +0000 Message-Id: <20201116173700.1830487-26-lee.jones@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20201116173700.1830487-1-lee.jones@linaro.org> References: <20201116173700.1830487-1-lee.jones@linaro.org> MIME-Version: 1.0 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: David Airlie , linux-kernel@vger.kernel.org, amd-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org, Alex Deucher , =?utf-8?q?Christian_K=C3=B6?= =?utf-8?q?nig?= Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Fixes the following W=1 kernel build warning(s): drivers/gpu/drm/radeon/ni.c:1733:5: warning: no previous prototype for ‘cayman_gpu_check_soft_reset’ [-Wmissing-prototypes] 1733 | u32 cayman_gpu_check_soft_reset(struct radeon_device *rdev) | ^~~~~~~~~~~~~~~~~~~~~~~~~~~ Cc: Alex Deucher Cc: "Christian König" Cc: David Airlie Cc: Daniel Vetter Cc: amd-gfx@lists.freedesktop.org Cc: dri-devel@lists.freedesktop.org Signed-off-by: Lee Jones --- drivers/gpu/drm/radeon/ni.h | 1 + drivers/gpu/drm/radeon/ni_dma.c | 3 +-- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/radeon/ni.h b/drivers/gpu/drm/radeon/ni.h index d63be1c88c0f1..9a5f31a05e68f 100644 --- a/drivers/gpu/drm/radeon/ni.h +++ b/drivers/gpu/drm/radeon/ni.h @@ -34,5 +34,6 @@ void cayman_cp_int_cntl_setup(struct radeon_device *rdev, int ring, u32 cp_int_cntl); void cayman_vm_decode_fault(struct radeon_device *rdev, u32 status, u32 addr); +u32 cayman_gpu_check_soft_reset(struct radeon_device *rdev); #endif /* __NI_H__ */ diff --git a/drivers/gpu/drm/radeon/ni_dma.c b/drivers/gpu/drm/radeon/ni_dma.c index c56136848360e..bd515ad4fe4cc 100644 --- a/drivers/gpu/drm/radeon/ni_dma.c +++ b/drivers/gpu/drm/radeon/ni_dma.c @@ -25,10 +25,9 @@ #include "radeon.h" #include "radeon_asic.h" #include "radeon_trace.h" +#include "ni.h" #include "nid.h" -u32 cayman_gpu_check_soft_reset(struct radeon_device *rdev); - /* * DMA * Starting with R600, the GPU has an asynchronous