From patchwork Fri Nov 16 15:47:37 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Christophe Lyon X-Patchwork-Id: 151357 Delivered-To: patch@linaro.org Received: by 2002:a2e:299d:0:0:0:0:0 with SMTP id p29-v6csp588485ljp; Fri, 16 Nov 2018 07:51:38 -0800 (PST) X-Google-Smtp-Source: AJdET5dMpuXaCXGArt01gAo8HRCo+lc0roR464OWQ4jnWIkADYoAnMKuElUbK+LUddw2MRNGfD03 X-Received: by 2002:a17:902:5a4d:: with SMTP id f13mr11731248plm.49.1542383498085; Fri, 16 Nov 2018 07:51:38 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1542383498; cv=none; d=google.com; s=arc-20160816; b=AHQILl/6DuoOIpkys8UadDncECLYCNwiie/bQw2nt2PXnKilhbgTVg3AgjUjH/QhhD 9nsDf/LtNVaHmwMLjpQj0z0ZZ0tzOov4f910lwJYdJjraUVVRO2hQC0Ymi8tlQ6aRS/D 0etZn38ScQyKwXq4mml19POmZhIOqMmHk1rYfLSerx5zuKfTthlSJNgYoUH8qA9WM4X+ 99NuI0H1z3t7F6uQrLwb4ZHqidTnKn5scKYbsv/gv860+YjgPk3HZACk0HkKafmqwTn6 jeZb7qQF+rrhvQe3CSjuyoAlAwyLdU8K7mlIMAa51mzrJ7b75/DioDFrxjSLtgtxDzKJ daWQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:delivered-to:sender:list-help :list-post:list-archive:list-unsubscribe:list-id:precedence :mailing-list:dkim-signature:domainkey-signature; bh=WZyVB7p2Ni9OcXRQXmrMXZ8mHWor4XFROT7XMnLU3xc=; b=K1y+/xA0LzifX3tEwxf7FiXhXblLFL4gYCHXE4w1fJZbq/3HG9iz6v+0AW1b62yMzd /eu218DHyzdntWGEIs61fhGCwe61eaL/BQaJ/fYSpYOYLnlLJkQEWH4F37dkph5az1un ZtzxKnkRkv4tdsIuRchXiRAFl8L//3tAtUzN3nt7ZHkL+NVuSmQQBoDIXA0tdRyIrJKB phWPoUnqsNFL0EFAWvRN2Iumct1tkY+81N6nOrfv+lOjE8tdXgLUoJydiuo2MxQLhEMq rBHA7SztC7M9ROuIY0MNcv0kHztz00zEzltdhlXOfr5xeahGGLKXL5BemtP2VrM0YWkG GYLw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@gcc.gnu.org header.s=default header.b=AI3hnOKb; spf=pass (google.com: domain of gcc-patches-return-490272-patch=linaro.org@gcc.gnu.org designates 209.132.180.131 as permitted sender) smtp.mailfrom="gcc-patches-return-490272-patch=linaro.org@gcc.gnu.org" Return-Path: Received: from sourceware.org (server1.sourceware.org. [209.132.180.131]) by mx.google.com with ESMTPS id b19si6000181pfm.100.2018.11.16.07.51.37 for (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 16 Nov 2018 07:51:38 -0800 (PST) Received-SPF: pass (google.com: domain of gcc-patches-return-490272-patch=linaro.org@gcc.gnu.org designates 209.132.180.131 as permitted sender) client-ip=209.132.180.131; Authentication-Results: mx.google.com; dkim=pass header.i=@gcc.gnu.org header.s=default header.b=AI3hnOKb; spf=pass (google.com: domain of gcc-patches-return-490272-patch=linaro.org@gcc.gnu.org designates 209.132.180.131 as permitted sender) smtp.mailfrom="gcc-patches-return-490272-patch=linaro.org@gcc.gnu.org" DomainKey-Signature: a=rsa-sha1; c=nofws; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:from :to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-type:content-transfer-encoding; q=dns; s= default; b=WRBeAHV2AGq6QbuWdZBdB7bZ6oqhtSxfzJhjDXtMoRqGlk0bXtbf8 QomrJBaBoJPQ5X8w8/IU3whqXTg14TxN5apQrABVCzZhYvBZtV9+4w8KyVxkQqN0 /6dlHE3bUHQvZjqZYeIkzG4pKBa3rtDsAVyF2zJ9q7q58NK2Y6PK4Q= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:from :to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-type:content-transfer-encoding; s=default; bh=AbwnA+mTEbRkxJves91C6FHr+3k=; b=AI3hnOKbgpc+sEcHS3txmstkluR+ Y8rx4vq/ROxkM7pcXg5UuUGMTQLkK4RYH2oxRJVkIaizgD4ZWFHvwG0ZhAuvg/th 9/PZ6NhRU+WmWgRl0kbxVJg9xSd7vX+iLN/3YXOPzNa/DPQH6/hA7AW90dJavHue bOrzlAhZxtl7Bhs= Received: (qmail 3349 invoked by alias); 16 Nov 2018 15:51:22 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Received: (qmail 3233 invoked by uid 89); 16 Nov 2018 15:51:21 -0000 Authentication-Results: sourceware.org; auth=none X-Spam-SWARE-Status: No, score=-27.6 required=5.0 tests=BAYES_00, GIT_PATCH_0, GIT_PATCH_1, GIT_PATCH_2, GIT_PATCH_3, RCVD_IN_DNSWL_LOW, SPF_PASS autolearn=ham version=3.3.2 spammy=IOR, trampoline_size, trampoline, TRAMPOLINE_SIZE X-HELO: mx07-00178001.pphosted.com Received: from mx08-00178001.pphosted.com (HELO mx07-00178001.pphosted.com) (91.207.212.93) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Fri, 16 Nov 2018 15:51:18 +0000 Received: from pps.filterd (m0046661.ppops.net [127.0.0.1]) by mx08-.pphosted.com (8.16.0.21/8.16.0.21) with SMTP id wAGFiXU2030555; Fri, 16 Nov 2018 16:51:16 +0100 Received: from beta.dmz-eu.st.com (beta.dmz-eu.st.com [164.129.1.35]) by mx08-00178001.pphosted.com with ESMTP id 2nsxqxrpfq-1 (version=TLSv1 cipher=ECDHE-RSA-AES256-SHA bits=256 verify=NOT); Fri, 16 Nov 2018 16:51:16 +0100 Received: from zeta.dmz-eu.st.com (zeta.dmz-eu.st.com [164.129.230.9]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 5D74B3A; Fri, 16 Nov 2018 15:51:15 +0000 (GMT) Received: from Webmail-eu.st.com (sfhdag5node1.st.com [10.75.127.13]) by zeta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 43EF45019; Fri, 16 Nov 2018 15:51:15 +0000 (GMT) Received: from gnb.st.com (10.75.127.45) by SFHDAG5NODE1.st.com (10.75.127.13) with Microsoft SMTP Server (TLS) id 15.0.1347.2; Fri, 16 Nov 2018 16:51:14 +0100 From: Christophe Lyon To: CC: Subject: [ARM/FDPIC v4 09/20] [ARM] FDPIC: Add support for taking address of nested function Date: Fri, 16 Nov 2018 16:47:37 +0100 Message-ID: <20181116154808.25154-10-christophe.lyon@st.com> In-Reply-To: <20181116154808.25154-1-christophe.lyon@st.com> References: <20181116154808.25154-1-christophe.lyon@st.com> MIME-Version: 1.0 X-IsSubscribed: yes In FDPIC mode, the trampoline generated to support pointers to nested functions looks like: .word trampoline address .word trampoline GOT address ldr r12, [pc, #8] ldr r9, [pc, #8] ldr pc, [pc, #8] .word static chain value .word GOT address .word function's address because in FDPIC function pointers are actually pointers to function descriptors, we have to actually generate a function descriptor for the trampoline. 2018-XX-XX Christophe Lyon Mickaël Guêné gcc/ * config/arm/arm.c (arm_asm_trampoline_template): Add FDPIC support. (arm_trampoline_init): Likewise. (arm_trampoline_init): Likewise. * config/arm/arm.h (TRAMPOLINE_SIZE): Likewise. -- 2.6.3 diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c index ca53eae..8c2b9d0 100644 --- a/gcc/config/arm/arm.c +++ b/gcc/config/arm/arm.c @@ -3963,13 +3963,50 @@ arm_warn_func_return (tree decl) .word static chain value .word function's address XXX FIXME: When the trampoline returns, r8 will be clobbered. */ +/* In FDPIC mode, the trampoline looks like: + .word trampoline address + .word trampoline GOT address + ldr r12, [pc, #8] ; #4 for Thumb2 + ldr r9, [pc, #8] ; #4 for Thumb2 + ldr pc, [pc, #8] ; #4 for Thumb2 + .word static chain value + .word GOT address + .word function's address +*/ static void arm_asm_trampoline_template (FILE *f) { fprintf (f, "\t.syntax unified\n"); - if (TARGET_ARM) + if (TARGET_FDPIC) + { + /* The first two words are a function descriptor pointing to the + trampoline code just below. */ + if (TARGET_ARM) + fprintf (f, "\t.arm\n"); + else if (TARGET_THUMB2) + fprintf (f, "\t.thumb\n"); + else + /* Only ARM and Thumb-2 are supported. */ + gcc_unreachable (); + + assemble_aligned_integer (UNITS_PER_WORD, const0_rtx); + assemble_aligned_integer (UNITS_PER_WORD, const0_rtx); + /* Trampoline code which sets the static chain register but also + PIC register before jumping into real code. */ + asm_fprintf (f, "\tldr\t%r, [%r, #%d]\n", + STATIC_CHAIN_REGNUM, PC_REGNUM, + TARGET_THUMB2 ? 8 : 4); + asm_fprintf (f, "\tldr\t%r, [%r, #%d]\n", + PIC_OFFSET_TABLE_REGNUM, PC_REGNUM, + TARGET_THUMB2 ? 8 : 4); + asm_fprintf (f, "\tldr\t%r, [%r, #%d]\n", + PC_REGNUM, PC_REGNUM, + TARGET_THUMB2 ? 8 : 4); + assemble_aligned_integer (UNITS_PER_WORD, const0_rtx); + } + else if (TARGET_ARM) { fprintf (f, "\t.arm\n"); asm_fprintf (f, "\tldr\t%r, [%r, #0]\n", STATIC_CHAIN_REGNUM, PC_REGNUM); @@ -4010,12 +4047,40 @@ arm_trampoline_init (rtx m_tramp, tree fndecl, rtx chain_value) emit_block_move (m_tramp, assemble_trampoline_template (), GEN_INT (TRAMPOLINE_SIZE), BLOCK_OP_NORMAL); - mem = adjust_address (m_tramp, SImode, TARGET_32BIT ? 8 : 12); - emit_move_insn (mem, chain_value); + if (TARGET_FDPIC) + { + rtx funcdesc = XEXP (DECL_RTL (fndecl), 0); + rtx fnaddr = gen_rtx_MEM (Pmode, funcdesc); + rtx gotaddr = gen_rtx_MEM (Pmode, plus_constant (Pmode, funcdesc, 4)); + /* The function start address is at offset 8, but in Thumb mode + we want bit 0 set to 1 to indicate Thumb-ness, hence 9 + below. */ + rtx trampoline_code_start + = plus_constant (Pmode, XEXP (m_tramp, 0), TARGET_THUMB2 ? 9 : 8); + + /* Write initial funcdesc which points to the trampoline. */ + mem = adjust_address (m_tramp, SImode, 0); + emit_move_insn (mem, trampoline_code_start); + mem = adjust_address (m_tramp, SImode, 4); + emit_move_insn (mem, gen_rtx_REG (Pmode, PIC_OFFSET_TABLE_REGNUM)); + /* Setup static chain. */ + mem = adjust_address (m_tramp, SImode, 20); + emit_move_insn (mem, chain_value); + /* GOT + real function entry point. */ + mem = adjust_address (m_tramp, SImode, 24); + emit_move_insn (mem, gotaddr); + mem = adjust_address (m_tramp, SImode, 28); + emit_move_insn (mem, fnaddr); + } + else + { + mem = adjust_address (m_tramp, SImode, TARGET_32BIT ? 8 : 12); + emit_move_insn (mem, chain_value); - mem = adjust_address (m_tramp, SImode, TARGET_32BIT ? 12 : 16); - fnaddr = XEXP (DECL_RTL (fndecl), 0); - emit_move_insn (mem, fnaddr); + mem = adjust_address (m_tramp, SImode, TARGET_32BIT ? 12 : 16); + fnaddr = XEXP (DECL_RTL (fndecl), 0); + emit_move_insn (mem, fnaddr); + } a_tramp = XEXP (m_tramp, 0); emit_library_call (gen_rtx_SYMBOL_REF (Pmode, "__clear_cache"), @@ -4029,7 +4094,9 @@ arm_trampoline_init (rtx m_tramp, tree fndecl, rtx chain_value) static rtx arm_trampoline_adjust_address (rtx addr) { - if (TARGET_THUMB) + /* For FDPIC don't fix trampoline address since it's a function + descriptor and not a function address. */ + if (TARGET_THUMB && !TARGET_FDPIC) addr = expand_simple_binop (Pmode, IOR, addr, const1_rtx, NULL, 0, OPTAB_LIB_WIDEN); return addr; diff --git a/gcc/config/arm/arm.h b/gcc/config/arm/arm.h index 35a2bd2..8e30a23 100644 --- a/gcc/config/arm/arm.h +++ b/gcc/config/arm/arm.h @@ -1584,7 +1584,7 @@ typedef struct #define INIT_EXPANDERS arm_init_expanders () /* Length in units of the trampoline for entering a nested function. */ -#define TRAMPOLINE_SIZE (TARGET_32BIT ? 16 : 20) +#define TRAMPOLINE_SIZE (TARGET_FDPIC ? 32 : (TARGET_32BIT ? 16 : 20)) /* Alignment required for a trampoline in bits. */ #define TRAMPOLINE_ALIGNMENT 32