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[209.132.180.131]) by mx.google.com with ESMTPS id 133si251905pfb.63.2017.06.09.06.05.10 for (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 09 Jun 2017 06:05:11 -0700 (PDT) Received-SPF: pass (google.com: domain of gcc-patches-return-455547-patch=linaro.org@gcc.gnu.org designates 209.132.180.131 as permitted sender) client-ip=209.132.180.131; Authentication-Results: mx.google.com; dkim=pass header.i=@gcc.gnu.org; spf=pass (google.com: domain of gcc-patches-return-455547-patch=linaro.org@gcc.gnu.org designates 209.132.180.131 as permitted sender) smtp.mailfrom=gcc-patches-return-455547-patch=linaro.org@gcc.gnu.org DomainKey-Signature: a=rsa-sha1; c=nofws; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:from :to:cc:subject:date:message-id:in-reply-to:references :in-reply-to:references:mime-version:content-type; q=dns; s= default; b=W73WfyW5Rb/yVbBqo6gyNfKweTUsgRdW0P1tVpmcpxvICm3r6ykDW JqFEU5cWxoYY8oSCj6za8TTVZ9Vy+1hqwyjo7NpGa7kgafPWhLQgb+7Po86TouXD iV5LiEz5GSRb78U3CY8l2r/7Zi9ZmtNqbmEVlk2dVqlbThOs1LQSZQ= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:from :to:cc:subject:date:message-id:in-reply-to:references :in-reply-to:references:mime-version:content-type; s=default; bh=+l6We7l0Hs2mmUhccFsJWArxgx8=; b=sOOezIEK567jazv093bZNiCdA7Qd WTOH9qOZQnHFxXzLK+pTHgvWKvuNJWacmFbZQANlHkat14ZkmWVpBjhtzyTvM49F 550oi19FxqQ8l80rUf5BgV7PqU5+Gfm67BkNcZDVYTrEr1ILzJc+UzEWE1JwReHZ 1cUHk1V/otf1zQE= Received: (qmail 101426 invoked by alias); 9 Jun 2017 12:55:03 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Received: (qmail 95903 invoked by uid 89); 9 Jun 2017 12:54:55 -0000 Authentication-Results: sourceware.org; auth=none X-Spam-SWARE-Status: No, score=-26.2 required=5.0 tests=BAYES_00, GIT_PATCH_0, GIT_PATCH_1, GIT_PATCH_2, GIT_PATCH_3, SPF_SOFTFAIL autolearn=ham version=3.3.2 spammy=practically X-HELO: eggs.gnu.org Received: from eggs.gnu.org (HELO eggs.gnu.org) (208.118.235.92) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Fri, 09 Jun 2017 12:54:46 +0000 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1dJJQf-0007Xv-Kh for gcc-patches@gcc.gnu.org; Fri, 09 Jun 2017 08:54:21 -0400 Received: from foss.arm.com ([217.140.101.70]:47128) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dJJQf-0007Te-8s for gcc-patches@gcc.gnu.org; Fri, 09 Jun 2017 08:54:17 -0400 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id F05651610; Fri, 9 Jun 2017 05:54:16 -0700 (PDT) Received: from e105689-lin.cambridge.arm.com (e105689-lin.cambridge.arm.com [10.2.207.32]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 6E8543F3E1; Fri, 9 Jun 2017 05:54:16 -0700 (PDT) From: Richard Earnshaw To: gcc-patches@gcc.gnu.org Cc: Richard Earnshaw Subject: [PATCH 11/30] [arm] Allow CPU and architecture extensions to be defined as aliases Date: Fri, 9 Jun 2017 13:53:40 +0100 Message-Id: <2fc3ed9faa917c9cf927e2f016725257b4040792.1497004220.git.Richard.Earnshaw@arm.com> In-Reply-To: References: In-Reply-To: References: MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 217.140.101.70 A follow up patch to this one will start to canonicalize options to simplify generating multilib fragments. This patch is enabling work for that. If we have extension options that duplicate other options (done principally for back-wards compatibility purposes) we need to ensure that just one of them will be used consistently when generating a canonical form of the user-specified options. We do this by explicitly noting when an option is defined as an alias of another. Another aspect of canonicalization is to enforce a strict order in which the options are inspected, we do this by ensuring that no later option examined can be a subset of an earlier option (add and remove options are treated separtely). It's practically impossible to check all this in parsecpu.awk since that premits use of C macros in the ISA features list, so instead we enforce the ordering with a selftest function in the compiler, which is only run when self tests are enabled (it's not something that will change every day, so this should be sufficient). * config/arm/arm-protos.h (cpu_arch_extension): Add field to record when an option is an alias of another. * config/arm/parsecpu.awk (optalias): New parser token. (gen_comm_data): Mark non-alias options as such. Emit entries for extension aliases. * config/arm/arm-cpus.in (armv5e): Make vfpv2 an alias. (armv5te, armv5tej, armv6, armv6j, armv6k, armv6z): Likewise. (armv6kz, armv6zk, armv6t2): Likewise. (armv7): Make vfpv3-d16 an alias. (armv7-a): Make vfpv3-d16, neon and neon-vfpv3 aliases. Sort in canonical order. (armv7ve): Make vfpv4-d16, neon-vfpv3 and neon-vfpv4 aliases. Sort in canonical order. (armv8-a): Sort in canonical order. (armv8.1-a, armv8.2-a): Likewise. (generic-armv7-a): Make neon and neon-vfpv3 aliases. Sort in canonical order. (cortex-a9): Sort in canonical order. * config/arm/arm.c (selftests.h): Include it. (arm_test_cpu_arch_data): New function. (arm_run_self_tests): New function. (TARGET_RUN_TARGET_SELFTESTS): Redefine. (targetm): Move declaration to the end of the file. * arm-cpu-cdata.h: Regenerated. --- gcc/config/arm/arm-cpu-cdata.h | 518 ++++++++++++++++++++--------------------- gcc/config/arm/arm-cpus.in | 77 +++--- gcc/config/arm/arm-protos.h | 6 + gcc/config/arm/arm.c | 82 ++++++- gcc/config/arm/parsecpu.awk | 57 ++++- 5 files changed, 439 insertions(+), 301 deletions(-) diff --git a/gcc/config/arm/arm-cpu-cdata.h b/gcc/config/arm/arm-cpu-cdata.h index eb13a5c..ddfb05c 100644 --- a/gcc/config/arm/arm-cpu-cdata.h +++ b/gcc/config/arm/arm-cpu-cdata.h @@ -22,394 +22,394 @@ static const cpu_arch_extension cpu_opttab_arm9e[] = { { - "nofp", true, + "nofp", true, false, { ISA_ALL_FP, isa_nobit } }, - { NULL, false, {isa_nobit}} + { NULL, false, false, {isa_nobit}} }; static const cpu_arch_extension cpu_opttab_arm946es[] = { { - "nofp", true, + "nofp", true, false, { ISA_ALL_FP, isa_nobit } }, - { NULL, false, {isa_nobit}} + { NULL, false, false, {isa_nobit}} }; static const cpu_arch_extension cpu_opttab_arm966es[] = { { - "nofp", true, + "nofp", true, false, { ISA_ALL_FP, isa_nobit } }, - { NULL, false, {isa_nobit}} + { NULL, false, false, {isa_nobit}} }; static const cpu_arch_extension cpu_opttab_arm968es[] = { { - "nofp", true, + "nofp", true, false, { ISA_ALL_FP, isa_nobit } }, - { NULL, false, {isa_nobit}} + { NULL, false, false, {isa_nobit}} }; static const cpu_arch_extension cpu_opttab_arm10e[] = { { - "nofp", true, + "nofp", true, false, { ISA_ALL_FP, isa_nobit } }, - { NULL, false, {isa_nobit}} + { NULL, false, false, {isa_nobit}} }; static const cpu_arch_extension cpu_opttab_arm1020e[] = { { - "nofp", true, + "nofp", true, false, { ISA_ALL_FP, isa_nobit } }, - { NULL, false, {isa_nobit}} + { NULL, false, false, {isa_nobit}} }; static const cpu_arch_extension cpu_opttab_arm1022e[] = { { - "nofp", true, + "nofp", true, false, { ISA_ALL_FP, isa_nobit } }, - { NULL, false, {isa_nobit}} + { NULL, false, false, {isa_nobit}} }; static const cpu_arch_extension cpu_opttab_arm926ejs[] = { { - "nofp", true, + "nofp", true, false, { ISA_ALL_FP, isa_nobit } }, - { NULL, false, {isa_nobit}} + { NULL, false, false, {isa_nobit}} }; static const cpu_arch_extension cpu_opttab_arm1026ejs[] = { { - "nofp", true, + "nofp", true, false, { ISA_ALL_FP, isa_nobit } }, - { NULL, false, {isa_nobit}} + { NULL, false, false, {isa_nobit}} }; static const cpu_arch_extension cpu_opttab_genericv7a[] = { { - "simd", false, - { ISA_VFPv3,ISA_NEON, isa_nobit } - }, - { - "vfpv3", false, - { ISA_VFPv3,ISA_FP_D32, isa_nobit } - }, - { - "vfpv3-d16", false, + "vfpv3-d16", false, false, { ISA_VFPv3,ISA_FP_DBL, isa_nobit } }, { - "vfpv3-fp16", false, - { ISA_VFPv3,ISA_FP_D32,isa_bit_fp16conv, isa_nobit } + "vfpv3", false, false, + { ISA_VFPv3,ISA_FP_D32, isa_nobit } }, { - "vfpv3-d16-fp16", false, + "vfpv3-d16-fp16", false, false, { ISA_VFPv3,ISA_FP_DBL,isa_bit_fp16conv, isa_nobit } }, { - "vfpv4", false, - { ISA_VFPv4,ISA_FP_D32, isa_nobit } + "vfpv3-fp16", false, false, + { ISA_VFPv3,ISA_FP_D32,isa_bit_fp16conv, isa_nobit } }, { - "vfpv4-d16", false, + "vfpv4-d16", false, false, { ISA_VFPv4,ISA_FP_DBL, isa_nobit } }, { - "neon", false, - { ISA_VFPv3,ISA_NEON, isa_nobit } + "vfpv4", false, false, + { ISA_VFPv4,ISA_FP_D32, isa_nobit } }, { - "neon-vfpv3", false, + "simd", false, false, { ISA_VFPv3,ISA_NEON, isa_nobit } }, { - "neon-fp16", false, + "neon-fp16", false, false, { ISA_VFPv3,ISA_NEON,isa_bit_fp16conv, isa_nobit } }, { - "neon-vfpv4", false, + "neon-vfpv4", false, false, { ISA_VFPv4,ISA_NEON, isa_nobit } }, { - "nofp", true, + "nosimd", true, false, + { ISA_ALL_SIMD, isa_nobit } + }, + { + "nofp", true, false, { ISA_ALL_FP, isa_nobit } }, { - "nosimd", true, - { ISA_ALL_SIMD, isa_nobit } + "neon", false, true, + { ISA_VFPv3,ISA_NEON, isa_nobit } }, - { NULL, false, {isa_nobit}} + { + "neon-vfpv3", false, true, + { ISA_VFPv3,ISA_NEON, isa_nobit } + }, + { NULL, false, false, {isa_nobit}} }; static const cpu_arch_extension cpu_opttab_cortexa5[] = { { - "nosimd", true, + "nosimd", true, false, { ISA_ALL_SIMD, isa_nobit } }, { - "nofp", true, + "nofp", true, false, { ISA_ALL_FP, isa_nobit } }, - { NULL, false, {isa_nobit}} + { NULL, false, false, {isa_nobit}} }; static const cpu_arch_extension cpu_opttab_cortexa7[] = { { - "nosimd", true, + "nosimd", true, false, { ISA_ALL_SIMD, isa_nobit } }, { - "nofp", true, + "nofp", true, false, { ISA_ALL_FP, isa_nobit } }, - { NULL, false, {isa_nobit}} + { NULL, false, false, {isa_nobit}} }; static const cpu_arch_extension cpu_opttab_cortexa8[] = { { - "nofp", true, + "nofp", true, false, { ISA_ALL_FP, isa_nobit } }, - { NULL, false, {isa_nobit}} + { NULL, false, false, {isa_nobit}} }; static const cpu_arch_extension cpu_opttab_cortexa9[] = { { - "nofp", true, - { ISA_ALL_FP, isa_nobit } + "nosimd", true, false, + { ISA_ALL_SIMD, isa_nobit } }, { - "nosimd", true, - { ISA_ALL_SIMD, isa_nobit } + "nofp", true, false, + { ISA_ALL_FP, isa_nobit } }, - { NULL, false, {isa_nobit}} + { NULL, false, false, {isa_nobit}} }; static const cpu_arch_extension cpu_opttab_cortexa12[] = { { - "nofp", true, + "nofp", true, false, { ISA_ALL_FP, isa_nobit } }, - { NULL, false, {isa_nobit}} + { NULL, false, false, {isa_nobit}} }; static const cpu_arch_extension cpu_opttab_cortexa15[] = { { - "nofp", true, + "nofp", true, false, { ISA_ALL_FP, isa_nobit } }, - { NULL, false, {isa_nobit}} + { NULL, false, false, {isa_nobit}} }; static const cpu_arch_extension cpu_opttab_cortexa17[] = { { - "nofp", true, + "nofp", true, false, { ISA_ALL_FP, isa_nobit } }, - { NULL, false, {isa_nobit}} + { NULL, false, false, {isa_nobit}} }; static const cpu_arch_extension cpu_opttab_cortexr5[] = { { - "nofp.dp", true, + "nofp.dp", true, false, { ISA_FP_DBL, isa_nobit } }, { - "nofp", true, + "nofp", true, false, { ISA_ALL_FP, isa_nobit } }, - { NULL, false, {isa_nobit}} + { NULL, false, false, {isa_nobit}} }; static const cpu_arch_extension cpu_opttab_cortexr7[] = { { - "nofp", true, + "nofp", true, false, { ISA_ALL_FP, isa_nobit } }, - { NULL, false, {isa_nobit}} + { NULL, false, false, {isa_nobit}} }; static const cpu_arch_extension cpu_opttab_cortexr8[] = { { - "nofp", true, + "nofp", true, false, { ISA_ALL_FP, isa_nobit } }, - { NULL, false, {isa_nobit}} + { NULL, false, false, {isa_nobit}} }; static const cpu_arch_extension cpu_opttab_cortexm7[] = { { - "nofp.dp", true, + "nofp.dp", true, false, { ISA_FP_DBL, isa_nobit } }, { - "nofp", true, + "nofp", true, false, { ISA_ALL_FP, isa_nobit } }, - { NULL, false, {isa_nobit}} + { NULL, false, false, {isa_nobit}} }; static const cpu_arch_extension cpu_opttab_cortexm4[] = { { - "nofp", true, + "nofp", true, false, { ISA_ALL_FP, isa_nobit } }, - { NULL, false, {isa_nobit}} + { NULL, false, false, {isa_nobit}} }; static const cpu_arch_extension cpu_opttab_cortexa15cortexa7[] = { { - "nofp", true, + "nofp", true, false, { ISA_ALL_FP, isa_nobit } }, - { NULL, false, {isa_nobit}} + { NULL, false, false, {isa_nobit}} }; static const cpu_arch_extension cpu_opttab_cortexa17cortexa7[] = { { - "nofp", true, + "nofp", true, false, { ISA_ALL_FP, isa_nobit } }, - { NULL, false, {isa_nobit}} + { NULL, false, false, {isa_nobit}} }; static const cpu_arch_extension cpu_opttab_cortexa32[] = { { - "crypto", false, + "crypto", false, false, { ISA_FP_ARMv8,ISA_CRYPTO, isa_nobit } }, { - "nofp", true, + "nofp", true, false, { ISA_ALL_FP, isa_nobit } }, - { NULL, false, {isa_nobit}} + { NULL, false, false, {isa_nobit}} }; static const cpu_arch_extension cpu_opttab_cortexa35[] = { { - "crypto", false, + "crypto", false, false, { ISA_FP_ARMv8,ISA_CRYPTO, isa_nobit } }, { - "nofp", true, + "nofp", true, false, { ISA_ALL_FP, isa_nobit } }, - { NULL, false, {isa_nobit}} + { NULL, false, false, {isa_nobit}} }; static const cpu_arch_extension cpu_opttab_cortexa53[] = { { - "crypto", false, + "crypto", false, false, { ISA_FP_ARMv8,ISA_CRYPTO, isa_nobit } }, { - "nofp", true, + "nofp", true, false, { ISA_ALL_FP, isa_nobit } }, - { NULL, false, {isa_nobit}} + { NULL, false, false, {isa_nobit}} }; static const cpu_arch_extension cpu_opttab_cortexa57[] = { { - "crypto", false, + "crypto", false, false, { ISA_FP_ARMv8,ISA_CRYPTO, isa_nobit } }, - { NULL, false, {isa_nobit}} + { NULL, false, false, {isa_nobit}} }; static const cpu_arch_extension cpu_opttab_cortexa72[] = { { - "crypto", false, + "crypto", false, false, { ISA_FP_ARMv8,ISA_CRYPTO, isa_nobit } }, - { NULL, false, {isa_nobit}} + { NULL, false, false, {isa_nobit}} }; static const cpu_arch_extension cpu_opttab_cortexa73[] = { { - "crypto", false, + "crypto", false, false, { ISA_FP_ARMv8,ISA_CRYPTO, isa_nobit } }, - { NULL, false, {isa_nobit}} + { NULL, false, false, {isa_nobit}} }; static const cpu_arch_extension cpu_opttab_exynosm1[] = { { - "crypto", false, + "crypto", false, false, { ISA_FP_ARMv8,ISA_CRYPTO, isa_nobit } }, - { NULL, false, {isa_nobit}} + { NULL, false, false, {isa_nobit}} }; static const cpu_arch_extension cpu_opttab_falkor[] = { { - "crypto", false, + "crypto", false, false, { ISA_FP_ARMv8,ISA_CRYPTO, isa_nobit } }, - { NULL, false, {isa_nobit}} + { NULL, false, false, {isa_nobit}} }; static const cpu_arch_extension cpu_opttab_qdf24xx[] = { { - "crypto", false, + "crypto", false, false, { ISA_FP_ARMv8,ISA_CRYPTO, isa_nobit } }, - { NULL, false, {isa_nobit}} + { NULL, false, false, {isa_nobit}} }; static const cpu_arch_extension cpu_opttab_xgene1[] = { { - "crypto", false, + "crypto", false, false, { ISA_FP_ARMv8,ISA_CRYPTO, isa_nobit } }, - { NULL, false, {isa_nobit}} + { NULL, false, false, {isa_nobit}} }; static const cpu_arch_extension cpu_opttab_cortexa57cortexa53[] = { { - "crypto", false, + "crypto", false, false, { ISA_FP_ARMv8,ISA_CRYPTO, isa_nobit } }, - { NULL, false, {isa_nobit}} + { NULL, false, false, {isa_nobit}} }; static const cpu_arch_extension cpu_opttab_cortexa72cortexa53[] = { { - "crypto", false, + "crypto", false, false, { ISA_FP_ARMv8,ISA_CRYPTO, isa_nobit } }, - { NULL, false, {isa_nobit}} + { NULL, false, false, {isa_nobit}} }; static const cpu_arch_extension cpu_opttab_cortexa73cortexa35[] = { { - "crypto", false, + "crypto", false, false, { ISA_FP_ARMv8,ISA_CRYPTO, isa_nobit } }, - { NULL, false, {isa_nobit}} + { NULL, false, false, {isa_nobit}} }; static const cpu_arch_extension cpu_opttab_cortexa73cortexa53[] = { { - "crypto", false, + "crypto", false, false, { ISA_FP_ARMv8,ISA_CRYPTO, isa_nobit } }, - { NULL, false, {isa_nobit}} + { NULL, false, false, {isa_nobit}} }; static const cpu_arch_extension cpu_opttab_cortexm33[] = { { - "nofp", true, + "nofp", true, false, { ISA_ALL_FP, isa_nobit } }, - { NULL, false, {isa_nobit}} + { NULL, false, false, {isa_nobit}} }; const cpu_option all_cores[] = @@ -1692,426 +1692,426 @@ const cpu_option all_cores[] = }; static const struct cpu_arch_extension arch_opttab_armv5e[] = { { - "fp", false, + "fp", false, false, { ISA_VFPv2,ISA_FP_DBL, isa_nobit } }, { - "vfpv2", false, - { ISA_VFPv2,ISA_FP_DBL, isa_nobit } + "nofp", true, false, + { ISA_ALL_FP, isa_nobit } }, { - "nofp", true, - { ISA_ALL_FP, isa_nobit } + "vfpv2", false, true, + { ISA_VFPv2,ISA_FP_DBL, isa_nobit } }, - { NULL, false, {isa_nobit}} + { NULL, false, false, {isa_nobit}} }; static const struct cpu_arch_extension arch_opttab_armv5te[] = { { - "fp", false, + "fp", false, false, { ISA_VFPv2,ISA_FP_DBL, isa_nobit } }, { - "vfpv2", false, - { ISA_VFPv2,ISA_FP_DBL, isa_nobit } + "nofp", true, false, + { ISA_ALL_FP, isa_nobit } }, { - "nofp", true, - { ISA_ALL_FP, isa_nobit } + "vfpv2", false, true, + { ISA_VFPv2,ISA_FP_DBL, isa_nobit } }, - { NULL, false, {isa_nobit}} + { NULL, false, false, {isa_nobit}} }; static const struct cpu_arch_extension arch_opttab_armv5tej[] = { { - "fp", false, + "fp", false, false, { ISA_VFPv2,ISA_FP_DBL, isa_nobit } }, { - "vfpv2", false, - { ISA_VFPv2,ISA_FP_DBL, isa_nobit } + "nofp", true, false, + { ISA_ALL_FP, isa_nobit } }, { - "nofp", true, - { ISA_ALL_FP, isa_nobit } + "vfpv2", false, true, + { ISA_VFPv2,ISA_FP_DBL, isa_nobit } }, - { NULL, false, {isa_nobit}} + { NULL, false, false, {isa_nobit}} }; static const struct cpu_arch_extension arch_opttab_armv6[] = { { - "fp", false, + "fp", false, false, { ISA_VFPv2,ISA_FP_DBL, isa_nobit } }, { - "vfpv2", false, - { ISA_VFPv2,ISA_FP_DBL, isa_nobit } + "nofp", true, false, + { ISA_ALL_FP, isa_nobit } }, { - "nofp", true, - { ISA_ALL_FP, isa_nobit } + "vfpv2", false, true, + { ISA_VFPv2,ISA_FP_DBL, isa_nobit } }, - { NULL, false, {isa_nobit}} + { NULL, false, false, {isa_nobit}} }; static const struct cpu_arch_extension arch_opttab_armv6j[] = { { - "fp", false, + "fp", false, false, { ISA_VFPv2,ISA_FP_DBL, isa_nobit } }, { - "vfpv2", false, - { ISA_VFPv2,ISA_FP_DBL, isa_nobit } + "nofp", true, false, + { ISA_ALL_FP, isa_nobit } }, { - "nofp", true, - { ISA_ALL_FP, isa_nobit } + "vfpv2", false, true, + { ISA_VFPv2,ISA_FP_DBL, isa_nobit } }, - { NULL, false, {isa_nobit}} + { NULL, false, false, {isa_nobit}} }; static const struct cpu_arch_extension arch_opttab_armv6k[] = { { - "fp", false, + "fp", false, false, { ISA_VFPv2,ISA_FP_DBL, isa_nobit } }, { - "vfpv2", false, - { ISA_VFPv2,ISA_FP_DBL, isa_nobit } + "nofp", true, false, + { ISA_ALL_FP, isa_nobit } }, { - "nofp", true, - { ISA_ALL_FP, isa_nobit } + "vfpv2", false, true, + { ISA_VFPv2,ISA_FP_DBL, isa_nobit } }, - { NULL, false, {isa_nobit}} + { NULL, false, false, {isa_nobit}} }; static const struct cpu_arch_extension arch_opttab_armv6z[] = { { - "fp", false, + "fp", false, false, { ISA_VFPv2,ISA_FP_DBL, isa_nobit } }, { - "vfpv2", false, - { ISA_VFPv2,ISA_FP_DBL, isa_nobit } + "nofp", true, false, + { ISA_ALL_FP, isa_nobit } }, { - "nofp", true, - { ISA_ALL_FP, isa_nobit } + "vfpv2", false, true, + { ISA_VFPv2,ISA_FP_DBL, isa_nobit } }, - { NULL, false, {isa_nobit}} + { NULL, false, false, {isa_nobit}} }; static const struct cpu_arch_extension arch_opttab_armv6kz[] = { { - "fp", false, + "fp", false, false, { ISA_VFPv2,ISA_FP_DBL, isa_nobit } }, { - "vfpv2", false, - { ISA_VFPv2,ISA_FP_DBL, isa_nobit } + "nofp", true, false, + { ISA_ALL_FP, isa_nobit } }, { - "nofp", true, - { ISA_ALL_FP, isa_nobit } + "vfpv2", false, true, + { ISA_VFPv2,ISA_FP_DBL, isa_nobit } }, - { NULL, false, {isa_nobit}} + { NULL, false, false, {isa_nobit}} }; static const struct cpu_arch_extension arch_opttab_armv6zk[] = { { - "fp", false, + "fp", false, false, { ISA_VFPv2,ISA_FP_DBL, isa_nobit } }, { - "vfpv2", false, - { ISA_VFPv2,ISA_FP_DBL, isa_nobit } + "nofp", true, false, + { ISA_ALL_FP, isa_nobit } }, { - "nofp", true, - { ISA_ALL_FP, isa_nobit } + "vfpv2", false, true, + { ISA_VFPv2,ISA_FP_DBL, isa_nobit } }, - { NULL, false, {isa_nobit}} + { NULL, false, false, {isa_nobit}} }; static const struct cpu_arch_extension arch_opttab_armv6t2[] = { { - "fp", false, + "fp", false, false, { ISA_VFPv2,ISA_FP_DBL, isa_nobit } }, { - "vfpv2", false, - { ISA_VFPv2,ISA_FP_DBL, isa_nobit } + "nofp", true, false, + { ISA_ALL_FP, isa_nobit } }, { - "nofp", true, - { ISA_ALL_FP, isa_nobit } + "vfpv2", false, true, + { ISA_VFPv2,ISA_FP_DBL, isa_nobit } }, - { NULL, false, {isa_nobit}} + { NULL, false, false, {isa_nobit}} }; static const struct cpu_arch_extension arch_opttab_armv7[] = { { - "fp", false, + "fp", false, false, { ISA_VFPv3,ISA_FP_DBL, isa_nobit } }, { - "vfpv3-d16", false, + "vfpv3-d16", false, true, { ISA_VFPv3,ISA_FP_DBL, isa_nobit } }, - { NULL, false, {isa_nobit}} + { NULL, false, false, {isa_nobit}} }; static const struct cpu_arch_extension arch_opttab_armv7_a[] = { { - "fp", false, + "fp", false, false, { ISA_VFPv3,ISA_FP_DBL, isa_nobit } }, { - "vfpv3-d16", false, - { ISA_VFPv3,ISA_FP_DBL, isa_nobit } - }, - { - "vfpv3", false, + "vfpv3", false, false, { ISA_VFPv3,ISA_FP_D32, isa_nobit } }, { - "vfpv3-d16-fp16", false, + "vfpv3-d16-fp16", false, false, { ISA_VFPv3,ISA_FP_DBL,isa_bit_fp16conv, isa_nobit } }, { - "vfpv3-fp16", false, + "vfpv3-fp16", false, false, { ISA_VFPv3,ISA_FP_DBL,ISA_FP_D32,isa_bit_fp16conv, isa_nobit } }, { - "vfpv4-d16", false, + "vfpv4-d16", false, false, { ISA_VFPv4,ISA_FP_DBL, isa_nobit } }, { - "vfpv4", false, + "vfpv4", false, false, { ISA_VFPv4,ISA_FP_D32, isa_nobit } }, { - "simd", false, + "simd", false, false, { ISA_VFPv3,ISA_NEON, isa_nobit } }, { - "neon", false, - { ISA_VFPv3,ISA_NEON, isa_nobit } + "neon-fp16", false, false, + { ISA_VFPv3,ISA_NEON,isa_bit_fp16conv, isa_nobit } }, { - "neon-vfpv3", false, - { ISA_VFPv3,ISA_NEON, isa_nobit } + "neon-vfpv4", false, false, + { ISA_VFPv4,ISA_NEON, isa_nobit } }, { - "neon-fp16", false, - { ISA_VFPv3,ISA_NEON,isa_bit_fp16conv, isa_nobit } + "nosimd", true, false, + { ISA_ALL_SIMD, isa_nobit } }, { - "neon-vfpv4", false, - { ISA_VFPv4,ISA_NEON, isa_nobit } + "nofp", true, false, + { ISA_ALL_FP, isa_nobit } }, { - "nofp", true, - { ISA_ALL_FP, isa_nobit } + "vfpv3-d16", false, true, + { ISA_VFPv3,ISA_FP_DBL, isa_nobit } }, { - "nosimd", true, - { ISA_ALL_SIMD, isa_nobit } + "neon", false, true, + { ISA_VFPv3,ISA_NEON, isa_nobit } }, - { NULL, false, {isa_nobit}} + { + "neon-vfpv3", false, true, + { ISA_VFPv3,ISA_NEON, isa_nobit } + }, + { NULL, false, false, {isa_nobit}} }; static const struct cpu_arch_extension arch_opttab_armv7ve[] = { { - "vfpv3-d16", false, + "vfpv3-d16", false, false, { ISA_VFPv3,ISA_FP_DBL, isa_nobit } }, { - "vfpv3", false, + "vfpv3", false, false, { ISA_VFPv3,ISA_FP_D32, isa_nobit } }, { - "vfpv3-d16-fp16", false, + "vfpv3-d16-fp16", false, false, { ISA_VFPv3,ISA_FP_DBL,isa_bit_fp16conv, isa_nobit } }, { - "vfpv3-fp16", false, + "vfpv3-fp16", false, false, { ISA_VFPv3,ISA_FP_DBL,ISA_FP_D32,isa_bit_fp16conv, isa_nobit } }, { - "vfpv4-d16", false, + "fp", false, false, { ISA_VFPv4,ISA_FP_DBL, isa_nobit } }, { - "fp", false, - { ISA_VFPv4,ISA_FP_DBL, isa_nobit } - }, - { - "vfpv4", false, + "vfpv4", false, false, { ISA_VFPv4,ISA_FP_D32, isa_nobit } }, { - "neon", false, + "neon", false, false, { ISA_VFPv3,ISA_NEON, isa_nobit } }, { - "neon-vfpv3", false, - { ISA_VFPv3,ISA_NEON, isa_nobit } - }, - { - "neon-fp16", false, + "neon-fp16", false, false, { ISA_VFPv3,ISA_NEON,isa_bit_fp16conv, isa_nobit } }, { - "simd", false, + "simd", false, false, { ISA_VFPv4,ISA_NEON, isa_nobit } }, { - "neon-vfpv4", false, - { ISA_VFPv4,ISA_NEON, isa_nobit } + "nosimd", true, false, + { ISA_ALL_SIMD, isa_nobit } }, { - "nofp", true, + "nofp", true, false, { ISA_ALL_FP, isa_nobit } }, { - "nosimd", true, - { ISA_ALL_SIMD, isa_nobit } + "vfpv4-d16", false, true, + { ISA_VFPv4,ISA_FP_DBL, isa_nobit } }, - { NULL, false, {isa_nobit}} + { + "neon-vfpv3", false, true, + { ISA_VFPv3,ISA_NEON, isa_nobit } + }, + { + "neon-vfpv4", false, true, + { ISA_VFPv4,ISA_NEON, isa_nobit } + }, + { NULL, false, false, {isa_nobit}} }; static const struct cpu_arch_extension arch_opttab_armv7_r[] = { { - "fp.sp", false, + "fp.sp", false, false, { ISA_VFPv3, isa_nobit } }, { - "fp", false, + "fp", false, false, { ISA_VFPv3,ISA_FP_DBL, isa_nobit } }, { - "idiv", false, + "idiv", false, false, { isa_bit_adiv, isa_nobit } }, { - "nofp", true, + "nofp", true, false, { ISA_ALL_FP, isa_nobit } }, { - "noidiv", true, + "noidiv", true, false, { isa_bit_adiv, isa_nobit } }, - { NULL, false, {isa_nobit}} + { NULL, false, false, {isa_nobit}} }; static const struct cpu_arch_extension arch_opttab_armv7e_m[] = { { - "fp", false, + "fp", false, false, { ISA_VFPv4, isa_nobit } }, { - "fpv5", false, + "fpv5", false, false, { ISA_FPv5, isa_nobit } }, { - "fp.dp", false, + "fp.dp", false, false, { ISA_FPv5,ISA_FP_DBL, isa_nobit } }, { - "nofp", true, + "nofp", true, false, { ISA_ALL_FP, isa_nobit } }, - { NULL, false, {isa_nobit}} + { NULL, false, false, {isa_nobit}} }; static const struct cpu_arch_extension arch_opttab_armv8_a[] = { { - "crc", false, + "crc", false, false, { isa_bit_crc32, isa_nobit } }, { - "simd", false, + "simd", false, false, { ISA_FP_ARMv8,ISA_NEON, isa_nobit } }, { - "crypto", false, + "crypto", false, false, { ISA_FP_ARMv8,ISA_CRYPTO, isa_nobit } }, { - "nofp", true, - { ISA_ALL_FP, isa_nobit } + "nocrypto", true, false, + { ISA_ALL_CRYPTO, isa_nobit } }, { - "nocrypto", true, - { ISA_ALL_CRYPTO, isa_nobit } + "nofp", true, false, + { ISA_ALL_FP, isa_nobit } }, - { NULL, false, {isa_nobit}} + { NULL, false, false, {isa_nobit}} }; static const struct cpu_arch_extension arch_opttab_armv8_1_a[] = { { - "simd", false, + "simd", false, false, { ISA_FP_ARMv8,ISA_NEON, isa_nobit } }, { - "crypto", false, + "crypto", false, false, { ISA_FP_ARMv8,ISA_CRYPTO, isa_nobit } }, { - "nofp", true, - { ISA_ALL_FP, isa_nobit } + "nocrypto", true, false, + { ISA_ALL_CRYPTO, isa_nobit } }, { - "nocrypto", true, - { ISA_ALL_CRYPTO, isa_nobit } + "nofp", true, false, + { ISA_ALL_FP, isa_nobit } }, - { NULL, false, {isa_nobit}} + { NULL, false, false, {isa_nobit}} }; static const struct cpu_arch_extension arch_opttab_armv8_2_a[] = { { - "simd", false, + "simd", false, false, { ISA_FP_ARMv8,ISA_NEON, isa_nobit } }, { - "fp16", false, + "fp16", false, false, { isa_bit_fp16,ISA_FP_ARMv8,ISA_NEON, isa_nobit } }, { - "crypto", false, + "crypto", false, false, { ISA_FP_ARMv8,ISA_CRYPTO, isa_nobit } }, { - "nofp", true, - { ISA_ALL_FP, isa_nobit } + "nocrypto", true, false, + { ISA_ALL_CRYPTO, isa_nobit } }, { - "nocrypto", true, - { ISA_ALL_CRYPTO, isa_nobit } + "nofp", true, false, + { ISA_ALL_FP, isa_nobit } }, - { NULL, false, {isa_nobit}} + { NULL, false, false, {isa_nobit}} }; static const struct cpu_arch_extension arch_opttab_armv8_m_main[] = { { - "dsp", false, + "dsp", false, false, { isa_bit_ARMv7em, isa_nobit } }, { - "fp", false, + "fp", false, false, { ISA_FPv5, isa_nobit } }, { - "fp.dp", false, + "fp.dp", false, false, { ISA_FPv5,ISA_FP_DBL, isa_nobit } }, { - "nofp", true, + "nofp", true, false, { ISA_ALL_FP, isa_nobit } }, - { NULL, false, {isa_nobit}} + { NULL, false, false, {isa_nobit}} }; const arch_option all_architectures[] = diff --git a/gcc/config/arm/arm-cpus.in b/gcc/config/arm/arm-cpus.in index 5a3a348..739de45 100644 --- a/gcc/config/arm/arm-cpus.in +++ b/gcc/config/arm/arm-cpus.in @@ -114,7 +114,7 @@ begin arch armv5e base 5E isa ARMv5e option fp add VFPv2 FP_DBL - option vfpv2 add VFPv2 FP_DBL + optalias vfpv2 fp option nofp remove ALL_FP end arch armv5e @@ -124,7 +124,7 @@ begin arch armv5te base 5TE isa ARMv5te option fp add VFPv2 FP_DBL - option vfpv2 add VFPv2 FP_DBL + optalias vfpv2 fp option nofp remove ALL_FP end arch armv5te @@ -134,7 +134,7 @@ begin arch armv5tej base 5TEJ isa ARMv5tej option fp add VFPv2 FP_DBL - option vfpv2 add VFPv2 FP_DBL + optalias vfpv2 fp option nofp remove ALL_FP end arch armv5tej @@ -144,7 +144,7 @@ begin arch armv6 base 6 isa ARMv6 option fp add VFPv2 FP_DBL - option vfpv2 add VFPv2 FP_DBL + optalias vfpv2 fp option nofp remove ALL_FP end arch armv6 @@ -154,7 +154,7 @@ begin arch armv6j base 6J isa ARMv6j option fp add VFPv2 FP_DBL - option vfpv2 add VFPv2 FP_DBL + optalias vfpv2 fp option nofp remove ALL_FP end arch armv6j @@ -164,7 +164,7 @@ begin arch armv6k base 6K isa ARMv6k option fp add VFPv2 FP_DBL - option vfpv2 add VFPv2 FP_DBL + optalias vfpv2 fp option nofp remove ALL_FP end arch armv6k @@ -174,7 +174,7 @@ begin arch armv6z base 6Z isa ARMv6z option fp add VFPv2 FP_DBL - option vfpv2 add VFPv2 FP_DBL + optalias vfpv2 fp option nofp remove ALL_FP end arch armv6z @@ -184,7 +184,7 @@ begin arch armv6kz base 6KZ isa ARMv6kz option fp add VFPv2 FP_DBL - option vfpv2 add VFPv2 FP_DBL + optalias vfpv2 fp option nofp remove ALL_FP end arch armv6kz @@ -194,7 +194,7 @@ begin arch armv6zk base 6KZ isa ARMv6kz option fp add VFPv2 FP_DBL - option vfpv2 add VFPv2 FP_DBL + optalias vfpv2 fp option nofp remove ALL_FP end arch armv6zk @@ -204,7 +204,7 @@ begin arch armv6t2 base 6T2 isa ARMv6t2 option fp add VFPv2 FP_DBL - option vfpv2 add VFPv2 FP_DBL + optalias vfpv2 fp option nofp remove ALL_FP end arch armv6t2 @@ -227,7 +227,7 @@ begin arch armv7 isa ARMv7 # fp => VFPv3-d16 (only useful for the A+R profile subset). option fp add VFPv3 FP_DBL - option vfpv3-d16 add VFPv3 FP_DBL + optalias vfpv3-d16 fp end arch armv7 begin arch armv7-a @@ -236,20 +236,20 @@ begin arch armv7-a base 7A isa ARMv7a # fp => VFPv3-d16, simd => neon-vfpv3 - option fp add VFPv3 FP_DBL - option vfpv3-d16 add VFPv3 FP_DBL - option vfpv3 add VFPv3 FP_D32 + option fp add VFPv3 FP_DBL + optalias vfpv3-d16 fp + option vfpv3 add VFPv3 FP_D32 option vfpv3-d16-fp16 add VFPv3 FP_DBL bit_fp16conv option vfpv3-fp16 add VFPv3 FP_DBL FP_D32 bit_fp16conv option vfpv4-d16 add VFPv4 FP_DBL - option vfpv4 add VFPv4 FP_D32 - option simd add VFPv3 NEON - option neon add VFPv3 NEON - option neon-vfpv3 add VFPv3 NEON + option vfpv4 add VFPv4 FP_D32 + option simd add VFPv3 NEON + optalias neon simd + optalias neon-vfpv3 simd option neon-fp16 add VFPv3 NEON bit_fp16conv option neon-vfpv4 add VFPv4 NEON - option nofp remove ALL_FP - option nosimd remove ALL_SIMD + option nosimd remove ALL_SIMD + option nofp remove ALL_FP end arch armv7-a begin arch armv7ve @@ -262,16 +262,16 @@ begin arch armv7ve option vfpv3 add VFPv3 FP_D32 option vfpv3-d16-fp16 add VFPv3 FP_DBL bit_fp16conv option vfpv3-fp16 add VFPv3 FP_DBL FP_D32 bit_fp16conv - option vfpv4-d16 add VFPv4 FP_DBL option fp add VFPv4 FP_DBL + optalias vfpv4-d16 fp option vfpv4 add VFPv4 FP_D32 option neon add VFPv3 NEON - option neon-vfpv3 add VFPv3 NEON + optalias neon-vfpv3 neon option neon-fp16 add VFPv3 NEON bit_fp16conv option simd add VFPv4 NEON - option neon-vfpv4 add VFPv4 NEON - option nofp remove ALL_FP - option nosimd remove ALL_SIMD + optalias neon-vfpv4 simd + option nosimd remove ALL_SIMD + option nofp remove ALL_FP end arch armv7ve begin arch armv7-r @@ -316,8 +316,8 @@ begin arch armv8-a option crc add bit_crc32 option simd add FP_ARMv8 NEON option crypto add FP_ARMv8 CRYPTO - option nofp remove ALL_FP option nocrypto remove ALL_CRYPTO + option nofp remove ALL_FP end arch armv8-a begin arch armv8.1-a @@ -327,8 +327,8 @@ begin arch armv8.1-a isa ARMv8_1a option simd add FP_ARMv8 NEON option crypto add FP_ARMv8 CRYPTO - option nofp remove ALL_FP option nocrypto remove ALL_CRYPTO + option nofp remove ALL_FP end arch armv8.1-a begin arch armv8.2-a @@ -339,8 +339,8 @@ begin arch armv8.2-a option simd add FP_ARMv8 NEON option fp16 add bit_fp16 FP_ARMv8 NEON option crypto add FP_ARMv8 CRYPTO - option nofp remove ALL_FP option nocrypto remove ALL_CRYPTO + option nofp remove ALL_FP end arch armv8.2-a begin arch armv8-m.base @@ -385,6 +385,7 @@ end arch iwmmxt2 # [fpu ] # [isa ] # [option add|remove ]* +# [optalias ]* # [costs ] # end cpu # @@ -392,7 +393,9 @@ end arch iwmmxt2 # non-valid punctuation characters to '_'. # If specified, tune for specifies a CPU target to use for tuning this core. # isa flags are appended to those defined by the architecture. - +# Each add option must have a distinct feature set and each remove +# option must similarly have a distinct feature set. Option aliases can be +# added with the optalias statement # V2/V2A Architecture Processors begin cpu arm2 @@ -921,19 +924,19 @@ begin cpu generic-armv7-a tune flags LDSCHED architecture armv7-a fpu vfpv3-d16 - option simd add VFPv3 NEON - option vfpv3 add VFPv3 FP_D32 option vfpv3-d16 add VFPv3 FP_DBL - option vfpv3-fp16 add VFPv3 FP_D32 bit_fp16conv + option vfpv3 add VFPv3 FP_D32 option vfpv3-d16-fp16 add VFPv3 FP_DBL bit_fp16conv - option vfpv4 add VFPv4 FP_D32 + option vfpv3-fp16 add VFPv3 FP_D32 bit_fp16conv option vfpv4-d16 add VFPv4 FP_DBL - option neon add VFPv3 NEON - option neon-vfpv3 add VFPv3 NEON + option vfpv4 add VFPv4 FP_D32 + option simd add VFPv3 NEON + optalias neon simd + optalias neon-vfpv3 simd option neon-fp16 add VFPv3 NEON bit_fp16conv option neon-vfpv4 add VFPv4 NEON - option nofp remove ALL_FP option nosimd remove ALL_SIMD + option nofp remove ALL_FP costs cortex end cpu generic-armv7-a @@ -971,8 +974,8 @@ begin cpu cortex-a9 tune flags LDSCHED architecture armv7-a fpu neon-fp16 - option nofp remove ALL_FP option nosimd remove ALL_SIMD + option nofp remove ALL_FP costs cortex_a9 end cpu cortex-a9 diff --git a/gcc/config/arm/arm-protos.h b/gcc/config/arm/arm-protos.h index f30b81e..25210e2 100644 --- a/gcc/config/arm/arm-protos.h +++ b/gcc/config/arm/arm-protos.h @@ -478,8 +478,14 @@ extern struct arm_build_target arm_active_target; struct cpu_arch_extension { + /* Feature name. */ const char *const name; + /* True if the option is negative (removes extensions). */ bool remove; + /* True if the option is an alias for another option with identical effect; + the option will be ignored for canonicalization. */ + bool alias; + /* The modifier bits. */ const enum isa_feature isa_bits[isa_num_bits]; }; diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c index 1716b38..73b1369 100644 --- a/gcc/config/arm/arm.c +++ b/gcc/config/arm/arm.c @@ -65,6 +65,7 @@ #include "optabs-libfuncs.h" #include "gimplify.h" #include "gimple.h" +#include "selftest.h" /* This file should be included last. */ #include "target-def.h" @@ -774,7 +775,6 @@ static const struct attribute_spec arm_attribute_table[] = #undef TARGET_CUSTOM_FUNCTION_DESCRIPTORS #define TARGET_CUSTOM_FUNCTION_DESCRIPTORS 2 -struct gcc_target targetm = TARGET_INITIALIZER; /* Obstack for minipool constant handling. */ static struct obstack minipool_obstack; @@ -31220,4 +31220,84 @@ arm_coproc_ldc_stc_legitimate_address (rtx op) } return false; } + +#if CHECKING_P +namespace selftest { + +/* Scan the static data tables generated by parsecpu.awk looking for + potential issues with the data. We primarily check for + inconsistencies in the option extensions at present (extensions + that duplicate others but aren't marked as aliases). Furthermore, + for correct canonicalization later options must never be a subset + of an earlier option. */ +static void +arm_test_cpu_arch_data (void) +{ + const arch_option *arch; + const cpu_option *cpu; + auto_sbitmap isa1 (isa_num_bits); + auto_sbitmap isa2 (isa_num_bits); + + for (arch = all_architectures; arch->common.name != NULL; ++arch) + { + const cpu_arch_extension *ext1, *ext2; + + if (arch->common.extensions == NULL) + continue; + + for (ext1 = arch->common.extensions; ext1->name != NULL; ++ext1) + { + if (ext1->alias) + continue; + + arm_initialize_isa (isa1, ext1->isa_bits); + for (ext2 = ext1 + 1; ext2->name != NULL; ++ext2) + { + if (ext2->alias || ext1->remove != ext2->remove) + continue; + + arm_initialize_isa (isa2, ext2->isa_bits); + ASSERT_TRUE (!bitmap_subset_p (isa2, isa1)); + } + } + } + + for (cpu = all_cores; cpu->common.name != NULL; ++cpu) + { + const cpu_arch_extension *ext1, *ext2; + + if (cpu->common.extensions == NULL) + continue; + + for (ext1 = cpu->common.extensions; ext1->name != NULL; ++ext1) + { + if (ext1->alias) + continue; + + arm_initialize_isa (isa1, ext1->isa_bits); + for (ext2 = ext1 + 1; ext2->name != NULL; ++ext2) + { + if (ext2->alias || ext1->remove != ext2->remove) + continue; + + arm_initialize_isa (isa2, ext2->isa_bits); + ASSERT_TRUE (!bitmap_subset_p (isa2, isa1)); + } + } + } +} + +static void +arm_run_selftests (void) +{ + arm_test_cpu_arch_data (); +} +} /* Namespace selftest. */ + +#undef TARGET_RUN_TARGET_SELFTESTS +#define TARGET_RUN_TARGET_SELFTESTS selftest::arm_run_selftests +#endif /* CHECKING_P */ + +struct gcc_target targetm = TARGET_INITIALIZER; + #include "gt-arm.h" diff --git a/gcc/config/arm/parsecpu.awk b/gcc/config/arm/parsecpu.awk index 3d6ca4d..61e8bc2 100644 --- a/gcc/config/arm/parsecpu.awk +++ b/gcc/config/arm/parsecpu.awk @@ -171,11 +171,28 @@ function gen_comm_data () { for (opt = 1; opt <= nopts; opt++) { print " {" print " \"" opts[opt] "\", " \ - cpu_opt_remove[cpus[n],opts[opt]] "," + cpu_opt_remove[cpus[n],opts[opt]] ", false," print " { " cpu_opt_isa[cpus[n],opts[opt]] ", isa_nobit }" print " }," } - print " { NULL, false, {isa_nobit}}" + if (cpus[n] in cpu_optaliases) { + naliases = split (cpu_optaliases[cpus[n]], aliases) + for (alias = 1; alias <= naliases; alias++) { + if (! ((cpus[n], \ + cpu_opt_alias[cpus[n],aliases[alias]]) in \ + cpu_opt_isa)) { + fatal("Alias " aliases[alias] " target not defined " \ + "for CPU " cpus[n]) + } + equiv=cpu_opt_alias[cpus[n],aliases[alias]] + print " {" + print " \"" aliases[alias] "\", " \ + cpu_opt_remove[cpus[n],equiv] ", true, " + print " { " cpu_opt_isa[cpus[n],equiv] ", isa_nobit }" + print " }," + } + } + print " { NULL, false, false, {isa_nobit}}" print "};\n" } } @@ -231,12 +248,31 @@ function gen_comm_data () { for (opt = 1; opt <= nopts; opt++) { print " {" print " \"" opts[opt] "\", " \ - arch_opt_remove[archs[n],opts[opt]] "," + arch_opt_remove[archs[n],opts[opt]] ", false," print " { " arch_opt_isa[archs[n],opts[opt]] ", isa_nobit }" print " }," } - print " { NULL, false, {isa_nobit}}" + if (archs[n] in arch_optaliases) { + naliases = split (arch_optaliases[archs[n]], aliases) + for (alias = 1; alias <= naliases; alias++) { + if (! ((archs[n], \ + arch_opt_alias[archs[n],aliases[alias]]) in \ + arch_opt_isa)) { + fatal("Alias " aliases[alias] " target not defined " \ + "for architecture " archs[n]) + } + equiv=arch_opt_alias[archs[n],aliases[alias]] + print " {" + print " \"" aliases[alias] "\", " \ + arch_opt_remove[archs[n],equiv] ", true, " + print " { " arch_opt_isa[archs[n],equiv] ", isa_nobit }" + print " }," + } + } + print " { NULL, false, false, {isa_nobit}}" print "};\n" + } else if (archs[n] in arch_optaliases) { + fatal("Architecture " archs[n] " has option aliases but no options") } } @@ -529,6 +565,19 @@ BEGIN { parse_ok = 1 } +/^[ ]*optalias / { + name=$2 + alias=$3 + if (cpu_name != "") { + cpu_optaliases[cpu_name] = cpu_optaliases[cpu_name] " " name + cpu_opt_alias[cpu_name,name] = alias + } else if (arch_name != "") { + arch_optaliases[arch_name] = arch_optaliases[arch_name] " " name + arch_opt_alias[arch_name,name] = alias + } else fatal("\"optalias\" outside of cpu or arch block") + parse_ok = 1 +} + /^[ ]*costs / { if (cpu_name == "") fatal("\"costs\" outside of cpu block") cpu_cost[cpu_name] = $2