From patchwork Wed Nov 16 14:04:12 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Richard Earnshaw \(lists\)" X-Patchwork-Id: 82537 Delivered-To: patch@linaro.org Received: by 10.182.1.168 with SMTP id 8csp197571obn; Wed, 16 Nov 2016 06:04:45 -0800 (PST) X-Received: by 10.99.4.213 with SMTP id 204mr8576165pge.77.1479305084910; Wed, 16 Nov 2016 06:04:44 -0800 (PST) Return-Path: Received: from sourceware.org (server1.sourceware.org. [209.132.180.131]) by mx.google.com with ESMTPS id 6si32009652pfl.234.2016.11.16.06.04.44 for (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 16 Nov 2016 06:04:44 -0800 (PST) Received-SPF: pass (google.com: domain of gcc-patches-return-441642-patch=linaro.org@gcc.gnu.org designates 209.132.180.131 as permitted sender) client-ip=209.132.180.131; Authentication-Results: mx.google.com; dkim=pass header.i=@gcc.gnu.org; spf=pass (google.com: domain of gcc-patches-return-441642-patch=linaro.org@gcc.gnu.org designates 209.132.180.131 as permitted sender) smtp.mailfrom=gcc-patches-return-441642-patch=linaro.org@gcc.gnu.org DomainKey-Signature: a=rsa-sha1; c=nofws; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:to :from:subject:message-id:date:mime-version:content-type; q=dns; s=default; b=NO7UL5GFyMwVLEnvkWU4iyajwVVyHudTnCdyQb7ayMe6TjUPnt s/MM8tetHA5O1lzt9hduyIfw6vWXW741ulCfWwY5L9hIMgpKCzo34d+m9lCef3t6 HAmN/cH7UXSKQfHmch4FEuGIqwzqL76JgxK1SldJszj2OgwICPghEMu1s= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:to :from:subject:message-id:date:mime-version:content-type; s= default; bh=fbHZRX2wQpdZ8fp1JavZCcHuFXk=; b=ZEYej7Otx8XQfGH/BcOE GvLyGTvsMid3JS1Zh2JmSGGmSxLcjBFzCQnG0oTyxnb7B9NtFswDvWt0m+t6cXqb /tAS4F/kWLudTP251SiMTqHe1bceIn7fygHtzC3lfGFU/HzBqHYusEBmaH8hmS+3 Jm9fTXeARUC7R5OSvu/xEw4= Received: (qmail 27743 invoked by alias); 16 Nov 2016 14:04:29 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Received: (qmail 27714 invoked by uid 89); 16 Nov 2016 14:04:27 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-4.5 required=5.0 tests=BAYES_00, KAM_LOTSOFHASH, RP_MATCHES_RCVD autolearn=ham version=3.3.2 spammy=@samp, samp, sk:3f9c0a0, 26, 6 X-HELO: foss.arm.com Received: from foss.arm.com (HELO foss.arm.com) (217.140.101.70) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Wed, 16 Nov 2016 14:04:17 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 3C87916; Wed, 16 Nov 2016 06:04:15 -0800 (PST) Received: from e105689-lin.cambridge.arm.com (e105689-lin.cambridge.arm.com [10.2.207.32]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id BF1823F24D; Wed, 16 Nov 2016 06:04:14 -0800 (PST) To: gcc-patches From: "Richard Earnshaw (lists)" Subject: [PATCH, ARM] Add vfpv2 and neon-vfpv3 Message-ID: <31a09c75-c8ed-e26c-5e7c-b281109faf40@arm.com> Date: Wed, 16 Nov 2016 14:04:12 +0000 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:45.0) Gecko/20100101 Thunderbird/45.4.0 MIME-Version: 1.0 The options -mfpu=neon and -mfpu=vfp have always meant a specific version of neon and vfp, but common usage seems to misunderstand this. To help clarify things I've added a couple of new option values to the -mfpu= option and have now documented the existing names as aliases. As discussed at the Cauldron, I would like long term to deprecate -mfpu entirely (watch this space). But in the mean time this makes things a bit clearer and perhaps also smoothes the transition path slightly. * arm/arm-fpus.def (vfpv2): New FPU, currently an alias for 'vfp'. (neon-vfpv3): New FPU, currently an alias for 'neon'. * arm/arm-tables.opt: Regenerated. * arm/t-aprofile (MULTILIB_REUSE): Add reuse rules for vfpv2 and neon-vfpv3. * doc/invoke.texi (ARM: -mfpu): Document new options. Note that 'vfp' and 'neon' are aliases for specific implementations. Tested on arm-none-eabi. Installed on trunk. R. diff --git a/gcc/config/arm/arm-fpus.def b/gcc/config/arm/arm-fpus.def index e0c43651d9392b718ce4fc5e2bbcf5fc1e097123..04b2ef140c44d78a1797a5125896fdf05a5a6fba 100644 --- a/gcc/config/arm/arm-fpus.def +++ b/gcc/config/arm/arm-fpus.def @@ -26,6 +26,7 @@ genopt.sh assumes no whitespace up to the first "," in each entry. */ ARM_FPU("vfp", 2, VFP_REG_D16, FPU_FL_NONE) +ARM_FPU("vfpv2", 2, VFP_REG_D16, FPU_FL_NONE) ARM_FPU("vfpv3", 3, VFP_REG_D32, FPU_FL_NONE) ARM_FPU("vfpv3-fp16", 3, VFP_REG_D32, FPU_FL_FP16) ARM_FPU("vfpv3-d16", 3, VFP_REG_D16, FPU_FL_NONE) @@ -33,6 +34,7 @@ ARM_FPU("vfpv3-d16-fp16", 3, VFP_REG_D16, FPU_FL_FP16) ARM_FPU("vfpv3xd", 3, VFP_REG_SINGLE, FPU_FL_NONE) ARM_FPU("vfpv3xd-fp16", 3, VFP_REG_SINGLE, FPU_FL_FP16) ARM_FPU("neon", 3, VFP_REG_D32, FPU_FL_NEON) +ARM_FPU("neon-vfpv3", 3, VFP_REG_D32, FPU_FL_NEON) ARM_FPU("neon-fp16", 3, VFP_REG_D32, FPU_FL_NEON | FPU_FL_FP16) ARM_FPU("vfpv4", 4, VFP_REG_D32, FPU_FL_FP16) ARM_FPU("vfpv4-d16", 4, VFP_REG_D16, FPU_FL_FP16) diff --git a/gcc/config/arm/arm-tables.opt b/gcc/config/arm/arm-tables.opt index ee9e3bb7ec57e0e8f2f15b83442711b9faf82d20..31e069c8177976a01c8cedaa651e1b57d07e7d36 100644 --- a/gcc/config/arm/arm-tables.opt +++ b/gcc/config/arm/arm-tables.opt @@ -465,56 +465,62 @@ EnumValue Enum(arm_fpu) String(vfp) Value(0) EnumValue -Enum(arm_fpu) String(vfpv3) Value(1) +Enum(arm_fpu) String(vfpv2) Value(1) EnumValue -Enum(arm_fpu) String(vfpv3-fp16) Value(2) +Enum(arm_fpu) String(vfpv3) Value(2) EnumValue -Enum(arm_fpu) String(vfpv3-d16) Value(3) +Enum(arm_fpu) String(vfpv3-fp16) Value(3) EnumValue -Enum(arm_fpu) String(vfpv3-d16-fp16) Value(4) +Enum(arm_fpu) String(vfpv3-d16) Value(4) EnumValue -Enum(arm_fpu) String(vfpv3xd) Value(5) +Enum(arm_fpu) String(vfpv3-d16-fp16) Value(5) EnumValue -Enum(arm_fpu) String(vfpv3xd-fp16) Value(6) +Enum(arm_fpu) String(vfpv3xd) Value(6) EnumValue -Enum(arm_fpu) String(neon) Value(7) +Enum(arm_fpu) String(vfpv3xd-fp16) Value(7) EnumValue -Enum(arm_fpu) String(neon-fp16) Value(8) +Enum(arm_fpu) String(neon) Value(8) EnumValue -Enum(arm_fpu) String(vfpv4) Value(9) +Enum(arm_fpu) String(neon-vfpv3) Value(9) EnumValue -Enum(arm_fpu) String(vfpv4-d16) Value(10) +Enum(arm_fpu) String(neon-fp16) Value(10) EnumValue -Enum(arm_fpu) String(fpv4-sp-d16) Value(11) +Enum(arm_fpu) String(vfpv4) Value(11) EnumValue -Enum(arm_fpu) String(fpv5-sp-d16) Value(12) +Enum(arm_fpu) String(vfpv4-d16) Value(12) EnumValue -Enum(arm_fpu) String(fpv5-d16) Value(13) +Enum(arm_fpu) String(fpv4-sp-d16) Value(13) EnumValue -Enum(arm_fpu) String(neon-vfpv4) Value(14) +Enum(arm_fpu) String(fpv5-sp-d16) Value(14) EnumValue -Enum(arm_fpu) String(fp-armv8) Value(15) +Enum(arm_fpu) String(fpv5-d16) Value(15) EnumValue -Enum(arm_fpu) String(neon-fp-armv8) Value(16) +Enum(arm_fpu) String(neon-vfpv4) Value(16) EnumValue -Enum(arm_fpu) String(crypto-neon-fp-armv8) Value(17) +Enum(arm_fpu) String(fp-armv8) Value(17) EnumValue -Enum(arm_fpu) String(vfp3) Value(18) +Enum(arm_fpu) String(neon-fp-armv8) Value(18) + +EnumValue +Enum(arm_fpu) String(crypto-neon-fp-armv8) Value(19) + +EnumValue +Enum(arm_fpu) String(vfp3) Value(20) diff --git a/gcc/config/arm/t-aprofile b/gcc/config/arm/t-aprofile index f852ecd04010ed54917c74e699a4580096b38e7f..7c5b10b75998ae0e20268fa946b3f35bf4456ada 100644 --- a/gcc/config/arm/t-aprofile +++ b/gcc/config/arm/t-aprofile @@ -111,6 +111,8 @@ MULTILIB_MATCHES += mfpu?vfpv4-d16=mfpu?vfpv4 MULTILIB_MATCHES += mfpu?vfpv4-d16=mfpu?fpv5-d16 MULTILIB_MATCHES += mfpu?vfpv4-d16=mfpu?fp-armv8 MULTILIB_MATCHES += mfpu?neon-fp-armv8=mfpu?crypto-neon-fp-armv8 +MULTILIB_MATCHES += mfpu?vfp=mfpu?vfpv2 +MULTILIB_MATCHES += mfpu?neon=mfpu?neon-vfpv3 # Map all requests for vfpv3 with a later CPU to vfpv3-d16 v7-a. diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi index 3f9c0a07be0ee33203eeb2ae89b89feb18705b9a..7b8070a73b63a0f32c491d697d121e0e7c7629cf 100644 --- a/gcc/doc/invoke.texi +++ b/gcc/doc/invoke.texi @@ -14751,12 +14751,14 @@ is unsuccessful the option has no effect. @item -mfpu=@var{name} @opindex mfpu This specifies what floating-point hardware (or hardware emulation) is -available on the target. Permissible names are: @samp{vfp}, @samp{vfpv3}, +available on the target. Permissible names are: @samp{vfpv2}, @samp{vfpv3}, @samp{vfpv3-fp16}, @samp{vfpv3-d16}, @samp{vfpv3-d16-fp16}, @samp{vfpv3xd}, -@samp{vfpv3xd-fp16}, @samp{neon}, @samp{neon-fp16}, @samp{vfpv4}, +@samp{vfpv3xd-fp16}, @samp{neon-vfpv3}, @samp{neon-fp16}, @samp{vfpv4}, @samp{vfpv4-d16}, @samp{fpv4-sp-d16}, @samp{neon-vfpv4}, @samp{fpv5-d16}, @samp{fpv5-sp-d16}, @samp{fp-armv8}, @samp{neon-fp-armv8} and @samp{crypto-neon-fp-armv8}. +Note that @samp{neon} is an alias for @samp{neon-vfpv3} and @samp{vfp} +is an alias for @samp{vfpv2}. If @option{-msoft-float} is specified this specifies the format of floating-point values.