From patchwork Wed Oct 28 10:07:00 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kyrylo Tkachov X-Patchwork-Id: 55659 Delivered-To: patch@linaro.org Received: by 10.112.61.134 with SMTP id p6csp16319lbr; Wed, 28 Oct 2015 03:07:33 -0700 (PDT) X-Received: by 10.68.254.137 with SMTP id ai9mr32875549pbd.68.1446026851207; Wed, 28 Oct 2015 03:07:31 -0700 (PDT) Return-Path: Received: from sourceware.org (server1.sourceware.org. [209.132.180.131]) by mx.google.com with ESMTPS id yk10si69341731pab.6.2015.10.28.03.07.30 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 28 Oct 2015 03:07:31 -0700 (PDT) Received-SPF: pass (google.com: domain of gcc-patches-return-411789-patch=linaro.org@gcc.gnu.org designates 209.132.180.131 as permitted sender) client-ip=209.132.180.131; Authentication-Results: mx.google.com; spf=pass (google.com: domain of gcc-patches-return-411789-patch=linaro.org@gcc.gnu.org designates 209.132.180.131 as permitted sender) smtp.mailfrom=gcc-patches-return-411789-patch=linaro.org@gcc.gnu.org; dkim=pass header.i=@gcc.gnu.org DomainKey-Signature: a=rsa-sha1; c=nofws; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender :message-id:date:from:mime-version:to:cc:subject:content-type; q=dns; s=default; b=QMHm//VkeAnnbmqc4/urznbAiepjoqzWxgDDh4xM8gn zP2jemuj9vE4B1AY6y7NCx3xthXCMfunvFLjTydxmvkWRjOjNIeFrq2vrYyfrNwY 1pBXgWeMVPSrtpCmiX3mhb+60k5JFLJiTVL0/KACep2HdmjXhxWG8H6D7jN/y+DM = DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender :message-id:date:from:mime-version:to:cc:subject:content-type; s=default; bh=92H+BcQZMY+CaW2QSNlb/3N9Lck=; b=q0ciDiaHvCWWs1Pcl i/CeRL4dGaV+qraM3cLEYoYtip5eYEBCvUv4wB9kp7Lzrdi5ujPAepSc86nzJuyw 8L0vMw8/1eenIPAXGjvNwAGeaQjDixiJ1uf/wO4KuACCrjkib0TNyOk+c++s1BQ1 iy2zattQP9oW6v60iEiqHVF0fk= Received: (qmail 18292 invoked by alias); 28 Oct 2015 10:07:08 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Received: (qmail 18267 invoked by uid 89); 28 Oct 2015 10:07:07 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-1.7 required=5.0 tests=AWL, BAYES_00, SPF_PASS autolearn=ham version=3.3.2 X-HELO: eu-smtp-delivery-143.mimecast.com Received: from eu-smtp-delivery-143.mimecast.com (HELO eu-smtp-delivery-143.mimecast.com) (146.101.78.143) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Wed, 28 Oct 2015 10:07:05 +0000 Received: from cam-owa1.Emea.Arm.com (fw-tnat.cambridge.arm.com [217.140.96.140]) by eu-smtp-1.mimecast.com with ESMTP id uk-mta-3-UD7_b6laTx6HdImd8-H03g-1; Wed, 28 Oct 2015 10:07:00 +0000 Received: from [10.2.207.50] ([10.1.2.79]) by cam-owa1.Emea.Arm.com with Microsoft SMTPSVC(6.0.3790.3959); Wed, 28 Oct 2015 10:07:00 +0000 Message-ID: <56309E44.8070100@arm.com> Date: Wed, 28 Oct 2015 10:07:00 +0000 From: Kyrill Tkachov User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:31.0) Gecko/20100101 Thunderbird/31.2.0 MIME-Version: 1.0 To: GCC Patches CC: Marcus Shawcroft , Ramana Radhakrishnan , Richard Earnshaw , James Greenhalgh Subject: [PATCH][ARM/AArch64] PR 68088: Fix RTL checking ICE due to subregs inside accumulator forwarding check X-MC-Unique: UD7_b6laTx6HdImd8-H03g-1 X-IsSubscribed: yes Hi all, This RTL checking error occurs on aarch64 in aarch_accumulator_forwarding when processing an msubsi insn with subregs: (insn 15 14 16 3 (set (reg/v:SI 78 [ i ]) (minus:SI (subreg:SI (reg/v:DI 76 [ aul ]) 0) (mult:SI (subreg:SI (reg:DI 83) 0) (subreg:SI (reg:DI 75 [ _20 ]) 0)))) schedice.c:10 357 {*msubsi} The register_operand predicate for that pattern allows subregs (I think correctly). The code in aarch_accumulator_forwarding doesn't take that into account and ends up taking a REGNO of a SUBREG, causing a checking error. This patch fixes that by stripping the subregs off the accumulator rtx before checking that the inner expression is a REG and taking its REGNO. The testcase now works fine with an aarch64-none-elf toolchain configure for RTL checking. The testcase is taken verbatim from the BZ entry for PR 68088. Since this function is shared between arm and aarch64 I've bootstrapped and tested it on both and I'll need ok's for both ports. Ok for trunk? Thanks, Kyrill 2015-10-28 Kyrylo Tkachov PR target/68088 * config/arm/aarch-common.c (aarch_strip_subreg): New function. (aarch_accumulator_forwarding): Strip subregs from accumulator rtx when appropriate. 2015-10-28 Kyrylo Tkachov * gcc.target/aarch64/pr68088_1.c: New test. commit 7ce1b9ec8b8486cab34071a9c120db13e7c3b96a Author: Kyrylo Tkachov Date: Tue Oct 27 11:42:19 2015 +0000 [ARM/AArch64] PR 68088: Fix RTL checking ICE due to subregs inside accumulator forwarding check diff --git a/gcc/config/arm/aarch-common.c b/gcc/config/arm/aarch-common.c index a940a02..2a21c4e 100644 --- a/gcc/config/arm/aarch-common.c +++ b/gcc/config/arm/aarch-common.c @@ -389,6 +389,15 @@ arm_mac_accumulator_is_result (rtx producer, rtx consumer) && !reg_overlap_mentioned_p (result, op1)); } +/* If X is a subreg return the value it contains, otherwise + return X unchanged. */ + +static rtx +aarch_strip_subreg (rtx x) +{ + return GET_CODE (x) == SUBREG ? SUBREG_REG (x) : x; +} + /* Return non-zero if the destination of PRODUCER feeds the accumulator operand of an MLA-like operation. */ @@ -420,14 +429,14 @@ aarch_accumulator_forwarding (rtx_insn *producer, rtx_insn *consumer) case PLUS: /* Possibly an MADD. */ if (GET_CODE (XEXP (mla, 0)) == MULT) - accumulator = XEXP (mla, 1); + accumulator = aarch_strip_subreg (XEXP (mla, 1)); else return 0; break; case MINUS: /* Possibly an MSUB. */ if (GET_CODE (XEXP (mla, 1)) == MULT) - accumulator = XEXP (mla, 0); + accumulator = aarch_strip_subreg (XEXP (mla, 0)); else return 0; break; @@ -441,7 +450,7 @@ aarch_accumulator_forwarding (rtx_insn *producer, rtx_insn *consumer) { /* FMADD/FMSUB. */ - accumulator = XEXP (mla, 2); + accumulator = aarch_strip_subreg (XEXP (mla, 2)); } else if (REG_P (XEXP (mla, 1)) && GET_CODE (XEXP (mla, 2)) == NEG @@ -449,7 +458,7 @@ aarch_accumulator_forwarding (rtx_insn *producer, rtx_insn *consumer) || GET_CODE (XEXP (mla, 0)) == NEG)) { /* FNMADD/FNMSUB. */ - accumulator = XEXP (XEXP (mla, 2), 0); + accumulator = aarch_strip_subreg (XEXP (XEXP (mla, 2), 0)); } else return 0; @@ -460,6 +469,9 @@ aarch_accumulator_forwarding (rtx_insn *producer, rtx_insn *consumer) return 0; } + if (!REG_P (accumulator)) + return 0; + return (REGNO (dest) == REGNO (accumulator)); } diff --git a/gcc/testsuite/gcc.target/aarch64/pr68088_1.c b/gcc/testsuite/gcc.target/aarch64/pr68088_1.c new file mode 100644 index 0000000..49c6aa1 --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/pr68088_1.c @@ -0,0 +1,15 @@ +/* { dg-do compile } */ +/* { dg-options "-O2" } */ + +void bar (unsigned long); + +void +foo (unsigned long aul, unsigned m, unsigned i) +{ + while (1) + { + aul += i; + i = aul % m; + bar (aul); + } +}