From patchwork Mon Dec 7 10:39:31 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kyrylo Tkachov X-Patchwork-Id: 57761 Delivered-To: patch@linaro.org Received: by 10.112.147.194 with SMTP id tm2csp1064307lbb; Mon, 7 Dec 2015 02:39:53 -0800 (PST) X-Received: by 10.98.19.130 with SMTP id 2mr42118606pft.93.1449484793123; Mon, 07 Dec 2015 02:39:53 -0800 (PST) Return-Path: Received: from sourceware.org (server1.sourceware.org. [209.132.180.131]) by mx.google.com with ESMTPS id rp16si657522pab.8.2015.12.07.02.39.52 for (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 07 Dec 2015 02:39:53 -0800 (PST) Received-SPF: pass (google.com: domain of gcc-patches-return-416532-patch=linaro.org@gcc.gnu.org designates 209.132.180.131 as permitted sender) client-ip=209.132.180.131; Authentication-Results: mx.google.com; spf=pass (google.com: domain of gcc-patches-return-416532-patch=linaro.org@gcc.gnu.org designates 209.132.180.131 as permitted sender) smtp.mailfrom=gcc-patches-return-416532-patch=linaro.org@gcc.gnu.org; dkim=pass header.i=@gcc.gnu.org DomainKey-Signature: a=rsa-sha1; c=nofws; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender :message-id:date:from:mime-version:to:cc:subject:content-type; q=dns; s=default; b=jA8zRnZ23InFLo3U0kN6TrAXqytiHhRFNTV2RzjKH1t GxwnHzvkqSvlYT1JNEJVk9or7YxDY+bmzTIcF2MiovV6Brmw9zZiHfMys/Ns6KK9 52h5ZQUDuXyqrpDQYPbVXSwo+tgkOz3/TR7q/ZI7M2/ekcFD7DnnApcK+bQZyXVs = DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender :message-id:date:from:mime-version:to:cc:subject:content-type; s=default; bh=YV7au7aSiR5+nS5Vr+KA0b5VYfo=; b=GcVT2492xUnP39Gkw sCjFU03v9oDVJ5d3lbPNho1uMkQh9lCJmn8r7dlz8/4gfStblJNmneZ7UMtCtHWk kAtbMqkLbbukLVxFFa+B4r0NTIDHQ5P861tXDf88V4d+2Otwcb6xnaPmqJFX2NQA aK6SvpFNvkB8lJkct8+XKM7YDk= Received: (qmail 43657 invoked by alias); 7 Dec 2015 10:39:41 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Received: (qmail 43606 invoked by uid 89); 7 Dec 2015 10:39:39 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-1.7 required=5.0 tests=AWL, BAYES_00, SPF_PASS autolearn=ham version=3.3.2 X-HELO: eu-smtp-delivery-143.mimecast.com Received: from eu-smtp-delivery-143.mimecast.com (HELO eu-smtp-delivery-143.mimecast.com) (146.101.78.143) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Mon, 07 Dec 2015 10:39:37 +0000 Received: from cam-owa1.Emea.Arm.com (fw-tnat.cambridge.arm.com [217.140.96.140]) by eu-smtp-1.mimecast.com with ESMTP id uk-mta-35-nlVH-RpYT3uOkdloKcxwDQ-1; Mon, 07 Dec 2015 10:39:31 +0000 Received: from [10.2.206.200] ([10.1.2.79]) by cam-owa1.Emea.Arm.com with Microsoft SMTPSVC(6.0.3790.3959); Mon, 7 Dec 2015 10:39:31 +0000 Message-ID: <566561E3.6020507@arm.com> Date: Mon, 07 Dec 2015 10:39:31 +0000 From: Kyrill Tkachov User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:31.0) Gecko/20100101 Thunderbird/31.2.0 MIME-Version: 1.0 To: GCC Patches CC: Ramana Radhakrishnan , Richard Earnshaw Subject: [PATCH][ARM] PR target/68648: Fold NOT of CONST_INT in andsi_iorsi3_notsi splitter X-MC-Unique: nlVH-RpYT3uOkdloKcxwDQ-1 X-IsSubscribed: yes Hi all, In this PR we ICE because during post-reload splitting we generate the insn: (insn 27 26 11 2 (set (reg:SI 0 r0 [orig:121 D.4992 ] [121]) (and:SI (not:SI (const_int 1 [0x1])) (reg:SI 0 r0 [orig:121 D.4992 ] [121]))) (nil)) The splitter at fault is andsi_iorsi3_notsi that accepts a const_int in operands[3] and outputs (not (match_dup 3)). It should really be trying to constant fold the result first. This patch does that by calling simplify_gen_unary to generate the complement of operands[3] if it's a register or the appropriate const_int rtx with the correct folded result that will still properly match the arm bic-immediate instruction. Bootstrapped and tested on arm-none-eabi. Is this ok for trunk? This appears on GCC 4.9 and GCC 5 and I'll be testing the fix there as well. Ok for those branches if testing is successful? Thanks, Kyrill 2015-12-07 Kyrylo Tkachov PR target/68648 * config/arm/arm.md (*andsi_iorsi3_notsi): Try to simplify the complement of operands[3] during splitting. 2015-12-07 Kyrylo Tkachov PR target/68648 * gcc.c-torture/execute/pr68648.c: New test. diff --git a/gcc/config/arm/arm.md b/gcc/config/arm/arm.md index 2b48bbaf034b286d723536ec2aa6fe0f9b312911..dfb75c5f11c66c6b4a34ff3071b5a0957c3512cb 100644 --- a/gcc/config/arm/arm.md +++ b/gcc/config/arm/arm.md @@ -3274,8 +3274,22 @@ (define_insn_and_split "*andsi_iorsi3_notsi" "#" ; "orr%?\\t%0, %1, %2\;bic%?\\t%0, %0, %3" "&& reload_completed" [(set (match_dup 0) (ior:SI (match_dup 1) (match_dup 2))) - (set (match_dup 0) (and:SI (not:SI (match_dup 3)) (match_dup 0)))] - "" + (set (match_dup 0) (and:SI (match_dup 4) (match_dup 5)))] + { + /* If operands[3] is a constant make sure to fold the NOT into it + to avoid creating a NOT of a CONST_INT. */ + rtx not_rtx = simplify_gen_unary (NOT, SImode, operands[3], SImode); + if (CONST_INT_P (not_rtx)) + { + operands[4] = operands[0]; + operands[5] = not_rtx; + } + else + { + operands[5] = operands[0]; + operands[4] = not_rtx; + } + } [(set_attr "length" "8") (set_attr "ce_count" "2") (set_attr "predicable" "yes") diff --git a/gcc/testsuite/gcc.c-torture/execute/pr68648.c b/gcc/testsuite/gcc.c-torture/execute/pr68648.c new file mode 100644 index 0000000000000000000000000000000000000000..fc66806a99a0abef7bd517ae2f5200b387e69ce4 --- /dev/null +++ b/gcc/testsuite/gcc.c-torture/execute/pr68648.c @@ -0,0 +1,20 @@ +int __attribute__ ((noinline)) +foo (void) +{ + return 123; +} + +int __attribute__ ((noinline)) +bar (void) +{ + int c = 1; + c |= 4294967295 ^ (foo () | 4073709551608); + return c; +} + +int +main () +{ + if (bar () != 0x83fd4005) + __builtin_abort (); +}