From patchwork Mon Sep 11 17:14:02 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Sandiford X-Patchwork-Id: 112205 Delivered-To: patch@linaro.org Received: by 10.140.106.117 with SMTP id d108csp4098144qgf; Mon, 11 Sep 2017 10:14:26 -0700 (PDT) X-Received: by 10.98.73.144 with SMTP id r16mr12299744pfi.314.1505150065928; Mon, 11 Sep 2017 10:14:25 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1505150065; cv=none; d=google.com; s=arc-20160816; b=oCspITpB4Q+pe5Y2ZMI1ga9+dutsxhtzKDLvs2RBD6m/PZq5e0FFayVcq35S+fCXku h2IkpEYoM4kpQpS6Kl7t7l4M/MGs/3+Ss7EeoeiVy7KyuSpnJBI9Lb5WlDFt2IHfofa5 WREdveawc2fteBTLgAgDf0IJN6BdvD5m75FQvX4nzMOk1k6fa0gY4swV4hVicZtTdf2I xfxw8Jw94WAmM3NtaNjwMYKAU9DCy97KQ/cQ1kGTCVJexB5FdDAKoL1DszWnLWynsxgN ye2mJX3CH6G6btmOiBqn2gW8SjR9Lw0Mn8I8FxBm8o/MWwStHGxjq1u4Yg6PZwJl4hLe HceA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=mime-version:user-agent:message-id:date:subject:mail-followup-to:to :from:delivered-to:sender:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:mailing-list:dkim-signature :domainkey-signature:arc-authentication-results; bh=e48lkRTtUbYvYrt43qKGUXpXzXu1hR3lXSqCVHC8QVs=; b=qON1bpQ8uPPMU4Kou3EDLNVGvsuLvd+6LiOdZnO2QX5kzOyJQY3Oqsv3PhhgPkousa 3lVQ+ll9cwIMFRv/HjtlozYmU7a/53mpVwIVbslmVkNH3DZHQcbd00w26wHR/Ku5dyi+ o/AARm6lE7u/NSBZoqVteoU1TCe/E88i20YruTUU7Yyzm+zqKDlM6gxF0qBoPBJ1KVoB vloIpeI3CEEohTDzSZIkQ4tV3IG315OnklrC4FwbHeDvSLF3FZjPnWIieuXULxfuYddq zXx4r1GtsJwUYcOaM/kghR/N1kotgVKX//o3TdP7yV6PpfS0F74t/etRlU8fr8hEOTkK HWsA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@gcc.gnu.org header.s=default header.b=PFrRHr41; spf=pass (google.com: domain of gcc-patches-return-461836-patch=linaro.org@gcc.gnu.org designates 209.132.180.131 as permitted sender) smtp.mailfrom=gcc-patches-return-461836-patch=linaro.org@gcc.gnu.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from sourceware.org (server1.sourceware.org. [209.132.180.131]) by mx.google.com with ESMTPS id p8si7375220plk.454.2017.09.11.10.14.25 for (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 11 Sep 2017 10:14:25 -0700 (PDT) Received-SPF: pass (google.com: domain of gcc-patches-return-461836-patch=linaro.org@gcc.gnu.org designates 209.132.180.131 as permitted sender) client-ip=209.132.180.131; Authentication-Results: mx.google.com; dkim=pass header.i=@gcc.gnu.org header.s=default header.b=PFrRHr41; spf=pass (google.com: domain of gcc-patches-return-461836-patch=linaro.org@gcc.gnu.org designates 209.132.180.131 as permitted sender) smtp.mailfrom=gcc-patches-return-461836-patch=linaro.org@gcc.gnu.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org DomainKey-Signature: a=rsa-sha1; c=nofws; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:from :to:subject:date:message-id:mime-version:content-type; q=dns; s= default; b=Momm0Xk9xXMN7hdiQOE5xfW6hljQ2zJLfqAGq/jJlDS+uUzr1OZD9 qqX/maMcFn4SjStFX3ZP0AHuLVc5+W4xt7yvb6LpVv2JDfSl+LiH0rZBLgHqjckw LgH3PmbRAiyX8lOGYYNf+CFNBRqIu532yYj948ES8SJc5sNhJbN9yo= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:from :to:subject:date:message-id:mime-version:content-type; s= default; bh=gEsuxcdq12awlduUxPhXXxGCkrs=; b=PFrRHr41h0zrNB+yT3BE MnHVBR4KUjwxOKQT41s0K2LV4UPyBwlh9pRWnjc/MLi/8sIj09h5N30cBCkwW1mH GpEX4wEt0JNv1qtelXwuoikQgeACUS34sT/WtqUdWfWiJpWH5Tv9hvL/ThoxYG4J DKs2m6YueXuEjLgKeHT4B9Q= Received: (qmail 61185 invoked by alias); 11 Sep 2017 17:14:11 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Received: (qmail 60211 invoked by uid 89); 11 Sep 2017 17:14:09 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-11.0 required=5.0 tests=AWL, BAYES_00, GIT_PATCH_2, GIT_PATCH_3, KAM_ASCII_DIVIDERS, RCVD_IN_DNSWL_NONE, SPF_PASS autolearn=ham version=3.3.2 spammy=*en, tertiary, (unknown) X-HELO: mail-wm0-f45.google.com Received: from mail-wm0-f45.google.com (HELO mail-wm0-f45.google.com) (74.125.82.45) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Mon, 11 Sep 2017 17:14:07 +0000 Received: by mail-wm0-f45.google.com with SMTP id 189so10210680wmh.1 for ; Mon, 11 Sep 2017 10:14:06 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:mail-followup-to:subject:date:message-id :user-agent:mime-version; bh=e48lkRTtUbYvYrt43qKGUXpXzXu1hR3lXSqCVHC8QVs=; b=I+jsg/oO7TZ9b3EDq8qNU1ope1nvSVYzs8XePl7VFw0pMDUN5gikkweZcL1XtfsDNx B6uprI59C2bsqmvnv+7m0IlcYdfiTykskHbkYNuIsKbt/vVyn7s7pYalmLRMyPbSsT7j xdNlVVwDcyLvWHhCUBV1ENStP0RSXY438DzESyh5EtP8RggVEDXO1q/PZ+STuirj6nGX cyud4jhi0KwxQpVJER8zE0OZxo/q5kRc9U3Q4h3TyGELzx+bQ07bVgLDcyRs57i/+ooe Tlz99dcpTdrgB7JSv03d/bTfujEnzxBjsZ2Q8hgMnlX4RVbwi5BrXzSKbM6ze5PAXhKv 14PA== X-Gm-Message-State: AHPjjUi9egkfzI9I782g3MKTGEtfPmivP2Go1Wer5u/tHAhaVRhUUKno 5MDrxm264wtd4G0VlFW4+Q== X-Google-Smtp-Source: ADKCNb6uYyDf6n1pbaCmdEY5UZ5tLqeHsWOfsJn0UpeFWRvRiFFcGnZOF7jG+BZS1HqsRreYkm4vfg== X-Received: by 10.28.146.20 with SMTP id u20mr7540678wmd.49.1505150044365; Mon, 11 Sep 2017 10:14:04 -0700 (PDT) Received: from localhost ([2.25.234.0]) by smtp.gmail.com with ESMTPSA id m86sm13417440wmi.27.2017.09.11.10.14.02 for (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Mon, 11 Sep 2017 10:14:03 -0700 (PDT) From: Richard Sandiford To: gcc-patches@gcc.gnu.org Mail-Followup-To: gcc-patches@gcc.gnu.org, richard.sandiford@linaro.org Subject: Make more use of REG_NREGS Date: Mon, 11 Sep 2017 18:14:02 +0100 Message-ID: <874ls9dup1.fsf@linaro.org> User-Agent: Gnus/5.13 (Gnus v5.13) Emacs/25.2 (gnu/linux) MIME-Version: 1.0 An upcoming patch will convert hard_regno_nregs into an inline function, which in turn allows hard_regno_nregs to be used as the name of a targetm field. This patch rewrites uses that are more easily (and efficiently) written as REG_NREGS. Tested on aarch64-linux-gnu, x86_64-linux-gnu and powerpc64le-linux-gnu. Also tested by comparing the testsuite assembly output on at least one target per CPU directory. OK to install? Richard 2017-09-11 Richard Sandiford gcc/ * caller-save.c (add_used_regs): Use REG_NREGS instead of hard_regno_nregs. * config/aarch64/aarch64.c (aarch64_split_combinev16qi): Likewise. * config/arm/arm.c (output_move_neon): Likewise. (arm_attr_length_move_neon): Likewise. (neon_split_vcombine): Likewise. * config/c6x/c6x.c (c6x_mark_reg_read): Likewise. (c6x_mark_reg_written): Likewise. (c6x_dwarf_register_span): Likewise. * config/i386/i386.c (ix86_save_reg): Likewise. * config/ia64/ia64.c (mark_reg_gr_used_mask): Likewise. (rws_access_reg): Likewise. * config/s390/s390.c (s390_call_saved_register_used): Likewise. * mode-switching.c (create_pre_exit): Likewise. * ree.c (combine_reaching_defs): Likewise. (add_removable_extension): Likewise. * regcprop.c (find_oldest_value_reg): Likewise. (copyprop_hardreg_forward_1): Likewise. * reload.c (reload_inner_reg_of_subreg): Likewise. (push_reload): Likewise. (combine_reloads): Likewise. (find_dummy_reload): Likewise. (reload_adjust_reg_for_mode): Likewise. * reload1.c (find_reload_regs): Likewise. (forget_old_reloads_1): Likewise. (reload_reg_free_for_value_p): Likewise. (reload_adjust_reg_for_temp): Likewise. (emit_reload_insns): Likewise. (delete_output_reload): Likewise. * sel-sched.c (choose_best_reg_1): Likewise. (choose_best_pseudo_reg): Likewise. Index: gcc/caller-save.c =================================================================== --- gcc/caller-save.c 2017-09-11 17:15:13.626435353 +0100 +++ gcc/caller-save.c 2017-09-11 17:16:57.862552768 +0100 @@ -1341,8 +1341,7 @@ add_used_regs (rtx *loc, void *data) { unsigned int regno = REGNO (x); if (HARD_REGISTER_NUM_P (regno)) - bitmap_set_range ((regset) data, regno, - hard_regno_nregs[regno][GET_MODE (x)]); + bitmap_set_range ((regset) data, regno, REG_NREGS (x)); else gcc_checking_assert (reg_renumber[regno] < 0); } Index: gcc/config/aarch64/aarch64.c =================================================================== --- gcc/config/aarch64/aarch64.c 2017-09-11 17:15:13.562442282 +0100 +++ gcc/config/aarch64/aarch64.c 2017-09-11 17:16:57.864552661 +0100 @@ -13105,7 +13105,7 @@ aarch64_split_combinev16qi (rtx operands unsigned int src1 = REGNO (operands[1]); unsigned int src2 = REGNO (operands[2]); machine_mode halfmode = GET_MODE (operands[1]); - unsigned int halfregs = HARD_REGNO_NREGS (src1, halfmode); + unsigned int halfregs = REG_NREGS (operands[1]); rtx destlo, desthi; gcc_assert (halfmode == V16QImode); Index: gcc/config/arm/arm.c =================================================================== --- gcc/config/arm/arm.c 2017-09-11 17:14:25.531400365 +0100 +++ gcc/config/arm/arm.c 2017-09-11 17:16:57.874552121 +0100 @@ -18589,7 +18589,7 @@ output_move_neon (rtx *operands) gcc_assert (REG_P (reg)); regno = REGNO (reg); - nregs = HARD_REGNO_NREGS (regno, mode) / 2; + nregs = REG_NREGS (reg) / 2; gcc_assert (VFP_REGNO_OK_FOR_DOUBLE (regno) || NEON_REGNO_OK_FOR_QUAD (regno)); gcc_assert (VALID_NEON_DREG_MODE (mode) @@ -18722,7 +18722,6 @@ arm_attr_length_move_neon (rtx_insn *ins gcc_assert (MEM_P (mem)); - mode = GET_MODE (reg); addr = XEXP (mem, 0); /* Strip off const from addresses like (const (plus (...))). */ @@ -18731,7 +18730,7 @@ arm_attr_length_move_neon (rtx_insn *ins if (GET_CODE (addr) == LABEL_REF || GET_CODE (addr) == PLUS) { - int insns = HARD_REGNO_NREGS (REGNO (reg), mode) / 2; + int insns = REG_NREGS (reg) / 2; return insns * 4; } else @@ -23713,7 +23712,7 @@ neon_split_vcombine (rtx operands[3]) unsigned int src1 = REGNO (operands[1]); unsigned int src2 = REGNO (operands[2]); machine_mode halfmode = GET_MODE (operands[1]); - unsigned int halfregs = HARD_REGNO_NREGS (src1, halfmode); + unsigned int halfregs = REG_NREGS (operands[1]); rtx destlo, desthi; if (src1 == dest && src2 == dest + halfregs) Index: gcc/config/c6x/c6x.c =================================================================== --- gcc/config/c6x/c6x.c 2017-09-11 17:14:25.531400365 +0100 +++ gcc/config/c6x/c6x.c 2017-09-11 17:16:57.875552068 +0100 @@ -4025,7 +4025,7 @@ c6x_mark_regno_read (int regno, bool cro c6x_mark_reg_read (rtx reg, bool cross) { unsigned regno = REGNO (reg); - unsigned nregs = hard_regno_nregs[regno][GET_MODE (reg)]; + unsigned nregs = REG_NREGS (reg); while (nregs-- > 0) c6x_mark_regno_read (regno + nregs, cross); @@ -4037,7 +4037,7 @@ c6x_mark_reg_read (rtx reg, bool cross) c6x_mark_reg_written (rtx reg, int cycles) { unsigned regno = REGNO (reg); - unsigned nregs = hard_regno_nregs[regno][GET_MODE (reg)]; + unsigned nregs = REG_NREGS (reg); while (nregs-- > 0) ss.reg_set_in_cycle[regno + nregs] = cycles; @@ -6336,7 +6336,7 @@ c6x_dwarf_register_span (rtx rtl) rtx p; regno = REGNO (rtl); - nregs = HARD_REGNO_NREGS (regno, GET_MODE (rtl)); + nregs = REG_NREGS (rtl); if (nregs == 1) return NULL_RTX; Index: gcc/config/i386/i386.c =================================================================== --- gcc/config/i386/i386.c 2017-09-11 17:14:25.531400365 +0100 +++ gcc/config/i386/i386.c 2017-09-11 17:16:57.892551151 +0100 @@ -12719,7 +12719,7 @@ ix86_save_reg (unsigned int regno, bool if (reg) { unsigned int i = REGNO (reg); - unsigned int nregs = hard_regno_nregs[i][GET_MODE (reg)]; + unsigned int nregs = REG_NREGS (reg); while (nregs-- > 0) if ((i + nregs) == regno) return false; @@ -12728,7 +12728,7 @@ ix86_save_reg (unsigned int regno, bool if (reg) { i = REGNO (reg); - nregs = hard_regno_nregs[i][GET_MODE (reg)]; + nregs = REG_NREGS (reg); while (nregs-- > 0) if ((i + nregs) == regno) return false; Index: gcc/config/ia64/ia64.c =================================================================== --- gcc/config/ia64/ia64.c 2017-09-11 17:14:25.531400365 +0100 +++ gcc/config/ia64/ia64.c 2017-09-11 17:16:57.893551097 +0100 @@ -2653,7 +2653,7 @@ mark_reg_gr_used_mask (rtx reg, void *da unsigned int regno = REGNO (reg); if (regno < 32) { - unsigned int i, n = hard_regno_nregs[regno][GET_MODE (reg)]; + unsigned int i, n = REG_NREGS (reg); for (i = 0; i < n; ++i) current_frame_info.gr_used_mask |= 1 << (regno + i); } @@ -6399,7 +6399,7 @@ rws_access_regno (int regno, struct reg_ rws_access_reg (rtx reg, struct reg_flags flags, int pred) { int regno = REGNO (reg); - int n = HARD_REGNO_NREGS (REGNO (reg), GET_MODE (reg)); + int n = REG_NREGS (reg); if (n == 1) return rws_access_regno (regno, flags, pred); Index: gcc/config/s390/s390.c =================================================================== --- gcc/config/s390/s390.c 2017-09-11 17:14:25.531400365 +0100 +++ gcc/config/s390/s390.c 2017-09-11 17:16:57.894551043 +0100 @@ -13241,9 +13241,7 @@ s390_call_saved_register_used (tree call if (REG_P (parm_rtx)) { - for (reg = 0; - reg < HARD_REGNO_NREGS (REGNO (parm_rtx), GET_MODE (parm_rtx)); - reg++) + for (reg = 0; reg < REG_NREGS (parm_rtx); reg++) if (!call_used_regs[reg + REGNO (parm_rtx)]) return true; } @@ -13258,9 +13256,7 @@ s390_call_saved_register_used (tree call gcc_assert (REG_P (r)); - for (reg = 0; - reg < HARD_REGNO_NREGS (REGNO (r), GET_MODE (r)); - reg++) + for (reg = 0; reg < REG_NREGS (r); reg++) if (!call_used_regs[reg + REGNO (r)]) return true; } Index: gcc/mode-switching.c =================================================================== --- gcc/mode-switching.c 2017-09-11 17:14:25.531400365 +0100 +++ gcc/mode-switching.c 2017-09-11 17:16:57.895550989 +0100 @@ -440,8 +440,7 @@ create_pre_exit (int n_entities, int *en || short_block || !(targetm.class_likely_spilled_p (REGNO_REG_CLASS (ret_start))) - || (nregs - != hard_regno_nregs[ret_start][GET_MODE (ret_reg)]) + || nregs != REG_NREGS (ret_reg) /* For multi-hard-register floating point values, sometimes the likely-spilled part is ordinarily copied first, then the other Index: gcc/ree.c =================================================================== --- gcc/ree.c 2017-09-11 17:15:13.643433513 +0100 +++ gcc/ree.c 2017-09-11 17:16:57.895550989 +0100 @@ -824,8 +824,7 @@ combine_reaching_defs (ext_cand *cand, c return false; /* Ensure the number of hard registers of the copy match. */ - if (HARD_REGNO_NREGS (REGNO (src_reg), dst_mode) - != HARD_REGNO_NREGS (REGNO (src_reg), GET_MODE (src_reg))) + if (HARD_REGNO_NREGS (REGNO (src_reg), dst_mode) != REG_NREGS (src_reg)) return false; /* There's only one reaching def. */ @@ -1138,8 +1137,7 @@ add_removable_extension (const_rtx expr, We allow this when the registers are different because the code in combine_reaching_defs will handle that case correctly. */ - if ((HARD_REGNO_NREGS (REGNO (dest), mode) - != HARD_REGNO_NREGS (REGNO (reg), GET_MODE (reg))) + if (HARD_REGNO_NREGS (REGNO (dest), mode) != REG_NREGS (reg) && reg_overlap_mentioned_p (dest, reg)) return; Index: gcc/regcprop.c =================================================================== --- gcc/regcprop.c 2017-09-11 17:15:13.616436436 +0100 +++ gcc/regcprop.c 2017-09-11 17:16:57.895550989 +0100 @@ -439,12 +439,9 @@ find_oldest_value_reg (enum reg_class cl (set (reg:SI r10) (...)) (set (...) (reg:DI r9)) Replacing r9 with r11 is invalid. */ - if (mode != vd->e[regno].mode) - { - if (hard_regno_nregs[regno][mode] - > hard_regno_nregs[regno][vd->e[regno].mode]) - return NULL_RTX; - } + if (mode != vd->e[regno].mode + && REG_NREGS (reg) > hard_regno_nregs[regno][vd->e[regno].mode]) + return NULL_RTX; for (i = vd->e[regno].oldest_regno; i != regno; i = vd->e[i].next_regno) { @@ -866,14 +863,13 @@ copyprop_hardreg_forward_1 (basic_block set it in, make sure that the replacement is valid. */ if (mode != vd->e[regno].mode) { - if (hard_regno_nregs[regno][mode] + if (REG_NREGS (src) > hard_regno_nregs[regno][vd->e[regno].mode]) goto no_move_special_case; /* And likewise, if we are narrowing on big endian the transformation is also invalid. */ - if (hard_regno_nregs[regno][mode] - < hard_regno_nregs[regno][vd->e[regno].mode] + if (REG_NREGS (src) < hard_regno_nregs[regno][vd->e[regno].mode] && subreg_lowpart_offset (mode, vd->e[regno].mode) != 0) goto no_move_special_case; } Index: gcc/reload.c =================================================================== --- gcc/reload.c 2017-09-11 17:14:25.531400365 +0100 +++ gcc/reload.c 2017-09-11 17:16:57.896550936 +0100 @@ -862,7 +862,7 @@ reload_inner_reg_of_subreg (rtx x, machi && GET_MODE_SIZE (mode) <= UNITS_PER_WORD && GET_MODE_SIZE (GET_MODE (inner)) > UNITS_PER_WORD && ((GET_MODE_SIZE (GET_MODE (inner)) / UNITS_PER_WORD) - != (int) hard_regno_nregs[REGNO (inner)][GET_MODE (inner)])); + != REG_NREGS (inner))); } /* Return nonzero if IN can be reloaded into REGNO with mode MODE without @@ -1086,8 +1086,7 @@ push_reload (rtx in, rtx out, rtx *inloc > UNITS_PER_WORD) && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in))) / UNITS_PER_WORD) - != (int) hard_regno_nregs[REGNO (SUBREG_REG (in))] - [GET_MODE (SUBREG_REG (in))])) + != REG_NREGS (SUBREG_REG (in)))) || !targetm.hard_regno_mode_ok (subreg_regno (in), inmode))) || (secondary_reload_class (1, rclass, inmode, in) != NO_REGS && (secondary_reload_class (1, rclass, GET_MODE (SUBREG_REG (in)), @@ -1597,7 +1596,7 @@ push_reload (rtx in, rtx out, rtx *inloc && (ORIGINAL_REGNO (XEXP (note, 0)) < FIRST_PSEUDO_REGISTER || (! bitmap_bit_p (DF_LR_OUT (ENTRY_BLOCK_PTR_FOR_FN (cfun)), ORIGINAL_REGNO (XEXP (note, 0))) - && hard_regno_nregs[regno][GET_MODE (XEXP (note, 0))] == 1)) + && REG_NREGS (XEXP (note, 0)) == 1)) && ! refers_to_regno_for_reload_p (regno, end_hard_regno (rel_mode, regno), @@ -1907,7 +1906,7 @@ combine_reloads (void) && TEST_HARD_REG_BIT (reg_class_contents[(int) rld[output_reload].rclass], regno) && (hard_regno_nregs[regno][rld[output_reload].outmode] - <= hard_regno_nregs[regno][GET_MODE (XEXP (note, 0))]) + <= REG_NREGS (XEXP (note, 0))) /* Ensure that a secondary or tertiary reload for this output won't want this register. */ && ((secondary_out = rld[output_reload].secondary_out_reload) == -1 @@ -1922,7 +1921,7 @@ combine_reloads (void) && (ORIGINAL_REGNO (XEXP (note, 0)) < FIRST_PSEUDO_REGISTER || (!bitmap_bit_p (DF_LR_OUT (ENTRY_BLOCK_PTR_FOR_FN (cfun)), ORIGINAL_REGNO (XEXP (note, 0))) - && hard_regno_nregs[regno][GET_MODE (XEXP (note, 0))] == 1))) + && REG_NREGS (XEXP (note, 0)) == 1))) { rld[output_reload].reg_rtx = gen_rtx_REG (rld[output_reload].outmode, regno); @@ -2088,7 +2087,7 @@ find_dummy_reload (rtx real_in, rtx real because only another subword of the hardreg is actually used in the insn. This cannot happen if the pseudo has been assigned exactly one hardreg. See PR 33732. */ - && hard_regno_nregs[REGNO (in)][GET_MODE (in)] == 1))) + && REG_NREGS (in) == 1))) { unsigned int regno = REGNO (in) + in_offset; unsigned int nwords = hard_regno_nregs[regno][inmode]; @@ -7254,8 +7253,7 @@ reload_adjust_reg_for_mode (rtx reloadre regno = REGNO (reloadreg); if (REG_WORDS_BIG_ENDIAN) - regno += (int) hard_regno_nregs[regno][GET_MODE (reloadreg)] - - (int) hard_regno_nregs[regno][mode]; + regno += (int) REG_NREGS (reloadreg) - (int) hard_regno_nregs[regno][mode]; return gen_rtx_REG (mode, regno); } Index: gcc/reload1.c =================================================================== --- gcc/reload1.c 2017-09-11 17:16:47.036145906 +0100 +++ gcc/reload1.c 2017-09-11 17:16:57.897550882 +0100 @@ -1965,10 +1965,8 @@ find_reload_regs (struct insn_chain *cha /* Show whether this reload already has a hard reg. */ if (chain->rld[i].reg_rtx) { - int regno = REGNO (chain->rld[i].reg_rtx); - chain->rld[i].regno = regno; - chain->rld[i].nregs - = hard_regno_nregs[regno][GET_MODE (chain->rld[i].reg_rtx)]; + chain->rld[i].regno = REGNO (chain->rld[i].reg_rtx); + chain->rld[i].nregs = REG_NREGS (chain->rld[i].reg_rtx); } else chain->rld[i].regno = -1; @@ -4911,7 +4909,7 @@ forget_old_reloads_1 (rtx x, const_rtx i { unsigned int i; - nr = hard_regno_nregs[regno][GET_MODE (x)]; + nr = REG_NREGS (x); /* Storing into a spilled-reg invalidates its contents. This can happen if a block-local pseudo is allocated to that reg and it wasn't spilled because this block's total need is 0. @@ -5875,8 +5873,7 @@ reload_reg_free_for_value_p (int start_r { rtx reg = rld[i].reg_rtx; if (reg && REG_P (reg) - && ((unsigned) regno - true_regnum (reg) - <= hard_regno_nregs[REGNO (reg)][GET_MODE (reg)] - (unsigned) 1) + && (unsigned) regno - true_regnum (reg) < REG_NREGS (reg) && i != reloadnum) { rtx other_input = rld[i].in; @@ -7156,8 +7153,7 @@ reload_adjust_reg_for_temp (rtx *reload_ { if (!targetm.hard_regno_mode_ok (regno, new_mode)) continue; - if (hard_regno_nregs[regno][new_mode] - > hard_regno_nregs[regno][GET_MODE (reg)]) + if (hard_regno_nregs[regno][new_mode] > REG_NREGS (reg)) continue; reg = reload_adjust_reg_for_mode (reg, new_mode); } @@ -8237,7 +8233,7 @@ emit_reload_insns (struct insn_chain *ch { machine_mode mode = GET_MODE (reg); int regno = REGNO (reg); - int nregs = hard_regno_nregs[regno][mode]; + int nregs = REG_NREGS (reg); rtx out = (REG_P (rld[r].out) ? rld[r].out : rld[r].out_reg @@ -8316,7 +8312,7 @@ emit_reload_insns (struct insn_chain *ch mode = GET_MODE (reg); regno = REGNO (reg); - nregs = hard_regno_nregs[regno][mode]; + nregs = REG_NREGS (reg); if (REG_P (rld[r].in) && REGNO (rld[r].in) >= FIRST_PSEUDO_REGISTER) in = rld[r].in; @@ -8838,10 +8834,7 @@ delete_output_reload (rtx_insn *insn, in return; regno = REGNO (reg); - if (regno >= FIRST_PSEUDO_REGISTER) - nregs = 1; - else - nregs = hard_regno_nregs[regno][GET_MODE (reg)]; + nregs = REG_NREGS (reg); /* If the pseudo-reg we are reloading is no longer referenced anywhere between the store into it and here, Index: gcc/sel-sched.c =================================================================== --- gcc/sel-sched.c 2017-09-11 17:14:25.531400365 +0100 +++ gcc/sel-sched.c 2017-09-11 17:16:57.899550774 +0100 @@ -1348,7 +1348,7 @@ choose_best_reg_1 (HARD_REG_SET hard_reg gcc_assert (mode == GET_MODE (orig_dest)); regno = REGNO (orig_dest); - for (i = 0, n = hard_regno_nregs[regno][mode]; i < n; i++) + for (i = 0, n = REG_NREGS (orig_dest); i < n; i++) if (TEST_HARD_REG_BIT (hard_regs_used, regno + i)) break; @@ -1463,7 +1463,7 @@ choose_best_pseudo_reg (regset used_regs if (HARD_REGISTER_NUM_P (orig_regno)) { int j, n; - for (j = 0, n = hard_regno_nregs[orig_regno][mode]; j < n; j++) + for (j = 0, n = REG_NREGS (dest); j < n; j++) if (REGNO_REG_SET_P (used_regs, orig_regno + j)) break; if (j < n)