[75/77] Use scalar_mode in the AArch64 port

Message ID	8760ewbtc5.fsf@linaro.org
State	Accepted
Commit	146c2e3ad070b6ba29bd48865ebb5c909f27d8e6
Headers	show Delivered-To: patch@linaro.org Received-SPF: pass (google.com: domain of gcc-patches-return-458067-patch=linaro.org@gcc.gnu.org designates 209.132.180.131 as permitted sender) client-ip=209.132.180.131; DomainKey-Signature: a=rsa-sha1; c=nofws; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:from :to:subject:references:date:in-reply-to:message-id:mime-version :content-type; q=dns; s=default; b=v9V+eHpwGH7GqVe/XjS8Xw3f+5USP GVV/S2uyp4eFOcRmcYSXESK9E/5t90JbfW9BmLd3TnzpOpzSF9IHhUHpH4MJBf+8 bt9nFipPqrPKi/qyLoQbMBb4nHbHKLtv7/NJsLBsbKkXDQAWJ8W9ofee1XzlhCfD 64Z83eco3kB0ZY= Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk Sender: gcc-patches-owner@gcc.gnu.org From: Richard Sandiford <richard.sandiford@linaro.org> To: gcc-patches@gcc.gnu.org Mail-Followup-To: gcc-patches@gcc.gnu.org, richard.sandiford@linaro.org Subject: [75/77] Use scalar_mode in the AArch64 port References: <8760ewohsv.fsf@linaro.org> Date: Thu, 13 Jul 2017 10:04:58 +0100 In-Reply-To: <8760ewohsv.fsf@linaro.org> (Richard Sandiford's message of "Thu, 13 Jul 2017 09:35:44 +0100") Message-ID: <8760ewbtc5.fsf@linaro.org> User-Agent: Gnus/5.13 (Gnus v5.13) Emacs/25.2 (gnu/linux) MIME-Version: 1.0 Content-Type: text/plain
Series	Add wrapper classes for machine_modes \| expand [00/77] Add wrapper classes for machine_modes [01/77] Add an E_ prefix to mode names [03/77] Allow machine modes to be classes [04/77] Add FOR_EACH iterators for modes [05/77] Small tweak to array_value_type [06/77] Make GET_MODE_WIDER return an opt_mode [07/77] Add scalar_float_mode [08/77] Simplify gen_trunc/extend_conv_libfunc [09/77] Add SCALAR_FLOAT_TYPE_MODE [10/77] Make assemble_real take a scalar_float_mode [11/77] Add a float_mode_for_size helper function [12/77] Use opt_scalar_float_mode when iterating over float modes [13/77] Make floatn_mode return an opt_scalar_float_mode [14/77] Make libgcc_floating_mode_supported_p take a scalar_float_mode [15/77] Add scalar_int_mode [16/77] Add scalar_int_mode_pod [17/77] Add an int_mode_for_size helper function [18/77] Make int_mode_for_mode return an opt_scalar_int_mode [19/77] Add a smallest_int_mode_for_size helper function [20/77] Replace MODE_INT checks with is_int_mode [21/77] Replace SCALAR_INT_MODE_P checks with is_a <scalar_int_mode> [22/77] Replace !VECTOR_MODE_P with is_a <scalar_int_mode> [23/77] Replace != VOIDmode checks with is_a <scalar_int_mode> [24/77] Replace a != BLKmode check with is_a <scalar_int_mode> [25/77] Use is_a <scalar_int_mode> for bitmask optimisations [26/77] Use is_a <scalar_int_mode> in subreg/extract simplifications [27/77] Use is_a <scalar_int_mode> before LOAD_EXTEND_OP [28/77] Use is_a <scalar_int_mode> for miscellaneous types of test [29/77] Make some _loc_descriptor helpers take scalar_int_mode [30/77] Use scalar_int_mode for doubleword splits [31/77] Use scalar_int_mode for move2add [32/77] Check is_a <scalar_int_mode> before calling valid_pointer_mode [33/77] Add a NARROWEST_INT_MODE macro [34/77] Add a SCALAR_INT_TYPE_MODE macro [35/77] Add uses of as_a <scalar_int_mode> [36/77] Use scalar_int_mode in the RTL iv routines [37/77] Use scalar_int_mode when emitting cstores [38/77] Move SCALAR_INT_MODE_P out of strict_volatile_bitfield_p [39/77] Two changes to the get_best_mode interface [40/77] Use scalar_int_mode for extraction_insn fields [41/77] Split scalar integer handling out of force_to_mode [42/77] Use scalar_int_mode in simplify_shift_const_1 [43/77] Use scalar_int_mode in simplify_comparison [44/77] Make simplify_and_const_int take a scalar_int_mode [45/77] Make extract_left_shift take a scalar_int_mode [46/77] Make widest_int_mode_for_size return a scalar_int_mode [47/77] Make subroutines of nonzero_bits operate on scalar_int_mode [48/77] Make subroutines of num_sign_bit_copies operate on scalar_int_mode [49/77] Simplify nonzero/num_sign_bits hooks [50/77] Add helper routines for SUBREG_PROMOTED_VAR_P subregs [51/77] Use opt_scalar_int_mode when iterating over integer modes [52/77] Use scalar_int_mode in extract/store_bit_field [53/77] Pass a mode to const_scalar_mask_from_tree [54/77] Add explicit int checks for alternative optab implementations [55/77] Use scalar_int_mode in simplify_const_unary_operation [56/77] Use the more specific type when two modes are known to be equal [57/77] Use scalar_int_mode in expand_expr_addr_expr [58/77] Use scalar_int_mode in a try_combine optimisation [59/77] Add a rtx_jump_table_data::get_data_mode helper [60/77] Pass scalar_int_modes to do_jump_by_parts_ [61/77] Use scalar_int_mode in the AArch64 port [63/77] Simplifications after type switch [64/77] Add a scalar_mode class [65/77] Add a SCALAR_TYPE_MODE macro [66/77] Use scalar_mode for constant integers [67/77] Use scalar_mode in fixed-value.* [68/77] Use scalar_mode for is_int_mode/is_float_mode pairs [69/77] Split scalar-only part out of convert_mode [70/77] Make expand_fix/float check for scalar modes [71/77] Use opt_scalar_mode for mode iterators [72/77] Pass scalar_mode to scalar_mode_supported_p [73/77] Pass scalar_mode to scalar_mode_supported_p [74/77] Various small scalar_mode changes [75/77] Use scalar_mode in the AArch64 port [76/77] Add a scalar_mode_pod class [77/77] Add a complex_mode class

Message ID

8760ewbtc5.fsf@linaro.org

State

Accepted

Commit

146c2e3ad070b6ba29bd48865ebb5c909f27d8e6

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Subject: [75/77] Use scalar_mode in the AArch64 port
References: <8760ewohsv.fsf@linaro.org>
Date: Thu, 13 Jul 2017 10:04:58 +0100
In-Reply-To: <8760ewohsv.fsf@linaro.org> (Richard Sandiford's message of
	"Thu, 13 Jul 2017 09:35:44 +0100")
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Series

Add wrapper classes for machine_modes | expand

Commit Message

Richard Sandiford July 13, 2017, 9:04 a.m. UTC

Similar to the previous scalar_int_mode patch.

2017-07-13  Richard Sandiford  <richard.sandiford@linaro.org>
	    Alan Hayward  <alan.hayward@arm.com>
	    David Sherwood  <david.sherwood@arm.com>

gcc/
	* config/aarch64/aarch64-protos.h (aarch64_gen_adjusted_ldpstp):
	Take a scalar_mode rather than a machine_mode.
	(aarch64_operands_adjust_ok_for_ldpstp): Likewise.
	* config/aarch64/aarch64.c (aarch64_simd_container_mode): Likewise.
	(aarch64_operands_adjust_ok_for_ldpstp): Likewise.
	(aarch64_gen_adjusted_ldpstp): Likewise.
	(aarch64_expand_vector_init): Use scalar_mode instead of machine_mode.

Comments

Jeff Law Aug. 25, 2017, 4:45 p.m. UTC | #1

On 07/13/2017 03:04 AM, Richard Sandiford wrote:
> Similar to the previous scalar_int_mode patch.

> 

> 2017-07-13  Richard Sandiford  <richard.sandiford@linaro.org>

> 	    Alan Hayward  <alan.hayward@arm.com>

> 	    David Sherwood  <david.sherwood@arm.com>

> 

> gcc/

> 	* config/aarch64/aarch64-protos.h (aarch64_gen_adjusted_ldpstp):

> 	Take a scalar_mode rather than a machine_mode.

> 	(aarch64_operands_adjust_ok_for_ldpstp): Likewise.

> 	* config/aarch64/aarch64.c (aarch64_simd_container_mode): Likewise.

> 	(aarch64_operands_adjust_ok_for_ldpstp): Likewise.

> 	(aarch64_gen_adjusted_ldpstp): Likewise.

> 	(aarch64_expand_vector_init): Use scalar_mode instead of machine_mode.

I'll leave this to the aarch64 folks.

jeff

James Greenhalgh Sept. 5, 2017, 8:48 a.m. UTC | #2

On Thu, Jul 13, 2017 at 10:04:58AM +0100, Richard Sandiford wrote:
> Similar to the previous scalar_int_mode patch.


OK.

Thanks,
James

> 

> 2017-07-13  Richard Sandiford  <richard.sandiford@linaro.org>

> 	    Alan Hayward  <alan.hayward@arm.com>

> 	    David Sherwood  <david.sherwood@arm.com>

> 

> gcc/

> 	* config/aarch64/aarch64-protos.h (aarch64_gen_adjusted_ldpstp):

> 	Take a scalar_mode rather than a machine_mode.

> 	(aarch64_operands_adjust_ok_for_ldpstp): Likewise.

> 	* config/aarch64/aarch64.c (aarch64_simd_container_mode): Likewise.

> 	(aarch64_operands_adjust_ok_for_ldpstp): Likewise.

> 	(aarch64_gen_adjusted_ldpstp): Likewise.

> 	(aarch64_expand_vector_init): Use scalar_mode instead of machine_mode.

>

Index: gcc/config/aarch64/aarch64-protos.h
===================================================================
--- gcc/config/aarch64/aarch64-protos.h	2017-07-13 09:18:50.737840686 +0100
+++ gcc/config/aarch64/aarch64-protos.h	2017-07-13 09:18:59.629192323 +0100
@@ -443,7 +443,7 @@  bool aarch64_atomic_ldop_supported_p (en
 void aarch64_gen_atomic_ldop (enum rtx_code, rtx, rtx, rtx, rtx, rtx);
 void aarch64_split_atomic_op (enum rtx_code, rtx, rtx, rtx, rtx, rtx, rtx);
 
-bool aarch64_gen_adjusted_ldpstp (rtx *, bool, machine_mode, RTX_CODE);
+bool aarch64_gen_adjusted_ldpstp (rtx *, bool, scalar_mode, RTX_CODE);
 #endif /* RTX_CODE */
 
 void aarch64_init_builtins (void);
@@ -471,7 +471,7 @@  int aarch64_ccmp_mode_to_code (machine_m
 
 bool extract_base_offset_in_addr (rtx mem, rtx *base, rtx *offset);
 bool aarch64_operands_ok_for_ldpstp (rtx *, bool, machine_mode);
-bool aarch64_operands_adjust_ok_for_ldpstp (rtx *, bool, machine_mode);
+bool aarch64_operands_adjust_ok_for_ldpstp (rtx *, bool, scalar_mode);
 
 extern void aarch64_asm_output_pool_epilogue (FILE *, const char *,
 					      tree, HOST_WIDE_INT);
Index: gcc/config/aarch64/aarch64.c
===================================================================
--- gcc/config/aarch64/aarch64.c	2017-07-13 09:18:58.445275699 +0100
+++ gcc/config/aarch64/aarch64.c	2017-07-13 09:18:59.630192253 +0100
@@ -11116,7 +11116,7 @@  aarch64_vector_mode_supported_p (machine
 /* Return appropriate SIMD container
    for MODE within a vector of WIDTH bits.  */
 static machine_mode
-aarch64_simd_container_mode (machine_mode mode, unsigned width)
+aarch64_simd_container_mode (scalar_mode mode, unsigned width)
 {
   gcc_assert (width == 64 || width == 128);
   if (TARGET_SIMD)
@@ -11882,7 +11882,7 @@  aarch64_simd_make_constant (rtx vals)
 aarch64_expand_vector_init (rtx target, rtx vals)
 {
   machine_mode mode = GET_MODE (target);
-  machine_mode inner_mode = GET_MODE_INNER (mode);
+  scalar_mode inner_mode = GET_MODE_INNER (mode);
   /* The number of vector elements.  */
   int n_elts = GET_MODE_NUNITS (mode);
   /* The number of vector elements which are not constant.  */
@@ -14684,7 +14684,7 @@  aarch64_operands_ok_for_ldpstp (rtx *ope
 
 bool
 aarch64_operands_adjust_ok_for_ldpstp (rtx *operands, bool load,
-				       machine_mode mode)
+				       scalar_mode mode)
 {
   enum reg_class rclass_1, rclass_2, rclass_3, rclass_4;
   HOST_WIDE_INT offval_1, offval_2, offval_3, offval_4, msize;
@@ -14818,7 +14818,7 @@  aarch64_operands_adjust_ok_for_ldpstp (r
 
 bool
 aarch64_gen_adjusted_ldpstp (rtx *operands, bool load,
-			     machine_mode mode, RTX_CODE code)
+			     scalar_mode mode, RTX_CODE code)
 {
   rtx base, offset, t1, t2;
   rtx mem_1, mem_2, mem_3, mem_4;

[75/77] Use scalar_mode in the AArch64 port

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